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1 datasheet caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright intersil americas llc 2014, 2015. all rights reserved intersil (and design), chargemode and digital-dc are trademar ks owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners. dual phase pmbus? chargemode? control dc/dc digital controller zl8801 the zl8801 is a dual phase digital dc/dc controller. up to four zl8801s (8 phases) can be operated in parallel to provide additional output current. the zl8801 supports a wide range of output voltages (0.54v to 5.5v) operating from input voltages as low as 4.5v up to 14v. with its fully digital chargemode? control loop the zl8801 can respond to a transient load step within a single switching cycle. this unique compensation-free modulation technique allows designs to meet transien t specifications with minimum output capacitance, thus saving cost and board space. intersil?s proprietary single wire ddc (digital-dc?) serial bus enables the zl8801 to communicate between other intersil digital power ics. by using the ddc, the zl8801 achieves complex functions such as inter-ic phase current balancing, sequencing and fault spreading, eliminating complicated power supply managers with numerous external discrete components. the zl8801 features cycle-by-cycle overcurrent protection and protection for overvoltage, undervoltage, over-temperature and mosfet driver under and overvoltage protection. a snapshot parametric capture feature allows users to take a snapshot of operating and fault data during normal or fault conditions. integrated low drop-out (ldo) regulators allow the zl8801 to be operated from a single input supply eliminating the need for additional linear regulators. a dedicated 5v vdrv ldo output can be used to power external drivers or drmos devices. with full pmbus? compliance, the zl8801 is capable of measuring and reporting input vo ltage, input current, output voltage, output current as well as the device?s internal temperature, an external temper ature and an auxiliary voltage input. related literature ? an1948 , ?zl8801-4ph-demo1z demonstration board user guide? ? ug005 , ?zl8801-2ph-demo1z demonstration board user guide? ? an1900 , ?usb to pmbus? adapter user guide? features ? unique compensation-free design ? always stable ? output voltage range: 0.54v to 5.5v ? input voltage range: 4.5v to 14v ? 1% output voltage accuracy over line, load and temperature ? charge mode control achieves fast transient response, reduced output capacitance and provides output stability without compensation ? single 2-phase output, up to 8 phases with multiple devices ? switching frequency range 200khz to 1.33mhz ? proprietary single wire ddc (digital-dc) serial bus enables voltage sequencing and fault spre ading with all other intersil digital power ics ? tracking of an external power supply in the single 2-phase configuration ? cycle-by-cycle inductor peak current protection ? digital fault protection for output voltage uv/ov, input voltage uv/ov, temperature and mosfet driver voltage ? 10-bit cycle-by-cycle average output current measurement with adjustable gain settings fo r sensing with high current, low dcr inductors ? 10-bit monitor adc measures in put voltage, input current, output voltage, internal, extern al temperature, driver voltage ? configurable to use standalone mosfet drivers or integrated driver-mosfet (drmos) devices ? nonvolatile memory (nvram) for storing operating parameters and fault events. ? pmbus? compliant applications ? servers/storage equipment ? telecom/datacom equipment ? power supplies (memory, dsp, asic, fpga) table 1. key differences between family of parts part number dual output dual phase ddc current share zl8800 yes yes no zl8801 no yes yes march 27, 2015 fn8614.3
zl8801 2 fn8614.3 march 27, 2015 submit document feedback table of contents simplified application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 pin configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 pin description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 thermal information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 zl8801 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 digital-dc architecture overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 power management overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 multi-mode pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 configurable pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 smbus device address selection (sa) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 output voltage and vout_max selection (vset) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 switching frequency setting (sync) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 input voltage undervoltage lockout setting (uvlo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 internal bias regulators and input supply connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 start-up procedure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 ton delay and rise times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 power-good. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 power management functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 output overvoltage protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 output prebias protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 output overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 current limit configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 input current monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 thermal overload protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 voltage tracking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 voltage margining . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 external voltage monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 smbus communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 digital-dc bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 phase spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 output sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 fault spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 active current sharing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 temperature monitoring using xtemp pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 nonvolatile memory (nvram) and security features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 dc/dc converter design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 power train component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 monitoring via smbus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 pmbus? command summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 pmbus? user guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 pmbus? data formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 pmbus? command detail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 about intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 package outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
zl8801 3 fn8614.3 march 27, 2015 submit document feedback simplified application figure 1. simplified application vo ut 0.6v to 5v zl8801 pwmh0 vdd sda scl pg gnd pwml0 vdrv ddc is ena0 is enb0 inter-devi ce communication pmbus control and status pwmh1 pwml1 vdrv is ena1 is enb1 vi n vi n vi n 4.5v to 14v salrt en vs enp vs enn bst vdd drmos vs w vi n pwm en gnd bst vdd drmos vs w vi n pwm en gnd
zl8801 4 fn8614.3 march 27, 2015 submit document feedback block diagram sda scl salrt xtemp1p/n sync xtemp0p/n ddc pwmh0 pwml0 digital-dc inter-device communications pmbus serial interface pin-strap resistor detection sa uvlo micro- controller and nonvolatile memory pll clk gen osc v25 vr5 vr6 ldos pga iinn iinp gain isena1 isenb1 isena0 isenb0 vdrv pga ipeak/ iavg adc ipeak/ iavg adc pga vse np/n ascr digital pwm modulator pwm+ dead time adc pwmh1 pwml1 vtrkp/n vmon monitor adc mux vdd vdd digital logic + ov/uv/oc/uc comparators pg en mgn dac vdrven iin adc vse t pwm+ dead time ascr digital pwm modulator adc figure 2. block diagram
zl8801 5 fn8614.3 march 27, 2015 submit document feedback schematic in review vin vout zl8801 pwmh0 pwmh1 vin vdd sda scl pg en sgnd dgnd pwml0 pwml1 vdrv ddc 10.8 to 13.2v isena0 isenb0 isena1 isenb1 inter-device coordination (optional) pmbus (optional) control status cout u3 r8 100k 6.65k r9 vmon isl99140 boot u2 phase vcc agnd sw pwm en c11 1f c10 c2 c6 1f c7 10f 0.1f c3 cin1 cin2 l2 c1 r1 r2 l1 sync vsenn vsenp 10f c4 c5 v25 v5 v6 r4 r5 64 sa vset0 uvlo rin 1m (optional) iinp iinn r3 sync r7 10k v5 isl99140 vin pgnd boot pvcc u1 phase vcc agnd sw pwm en c9 1f c8 0.1f thdn smod thdn smod 10f 10f pvcc vin pgnd and figure 3. zl8801 schematic
zl8801 6 fn8614.3 march 27, 2015 submit document feedback pin configuration zl8801 (44 ld qfn) top view pin description pin# pin name type ( note 1 )description 1 scl i/o serial clock. connect to external host and/or to other zl devices. requires a pull-up resistor to a 2.5v to 5.5v (recommend vr5, do not use v25) source. 2 sda i/o serial data. connect to external host and/or to other zl devices. requires a pull-up resistor to a 2.5v to 5.5v (recommend vr5, do not use v25) source. 3 salrt o serial alert. connect to external host if desired. requ ires a pull-up resistor to a 2.5v to 5.5v (recommend vr5) source. if not used this pin should be left floating. 4 sgnd pwr connect to low impedance ground plane. internal conne ction to sgnd. all pin-strap resistors should be connected to sgnd. sgnd must be connected to dgnd and pgnd using a single point connection. 5 sa m serial address select pin. used to assign unique address for each individual device or to enable certain management features. see table 3 for smbus address options. connect resistor to sgnd. 6 vmon i external voltage monitoring (can be used for external driver bias (vdrv) monitoring). requires an external 16:1 resistor divider network. connect bottom of resistor divi der network to sgnd. connect di vider network to vr5 if an external voltage is not monitored. 7 dgnd pwr digital ground. must connect to sgnd and pgnd using a single point connection. 8 mgn i margin pin. high = margin high, low = margin low, float = no margin. 10 vset m output voltage selection pin. used to set v out and v out max. see table 4 for v out pin-strap options. default vout max is 115% of v out setting, but this can be overridden via the pm bus interface with vout_max command. connect resistor to sgnd. 12 pg o power-good output. can be configured as open-drain or push-pull using the pmbus interface. default setting is open drain. 13 uvlo m undervoltage lockout selection. sets the minimum value for v dd voltage to enable v out . see table 6 for uvlo setting options. pin-strapped (configured) values can be overri dden by the pmbus interface. connect resistor to sgnd. 14 ddc i/o single wire ddc bus (current sharing and interdevice co mmunication). requires a pull-up resistor to a 2.5 to 5.5v (recommend vr5, do not use v25) so urce. pull-up voltage must be present when the device is powered. 15 xtemp0p i external temperature sensor input. connect to ex ternal 2n3904 (base emitter junc tion) or equivalent embedded thermal diode. if not used connect to sgnd. sg nd sa vm on dgnd mgn nc scl salrt sda vdrv isena1 isenb1 pw ml 1 pw mh 1 pw mh 0 vdd vr 6 vr 5 nc nc nc v25 sy nc en nc xt em p0p xt em p0n vt rkp vs enp vt rkn vs enn pg ddc uvlo ex po sed p addle connect to sgnd 12 13 14 15 16 17 18 19 20 1 2 3 4 5 6 7 8 9 33 32 31 30 29 28 27 26 25 21 22 44 43 42 41 40 39 38 37 36 35 34 10 11 23 24 pw ml 0 isenb0 vdrven isena0 iinp iinn vs et nc xt em p1n xt em p1p
zl8801 7 fn8614.3 march 27, 2015 submit document feedback 16 xtemp0n i external temperature sensor inpu t return. if not used connect to sgnd. 17 vtrkp i tracking sense positive input. used to track an extern al voltage source. if not used, this pin can be left floating. tracking is only possible in 2-ph ase operation. tracking is disabled in 4-, 6- and 8-phase operation. 18 vtrkn i tracking sense negative input (return). if not used, this pin can be left floating. 19 vsenp i differential voltage sense feedback. co nnect to positive output regulation point. 20 vsenn i differential voltage sense feedback. co nnect to negative output regulation point. 21 vdrven i vdrv (mosfet driver bias supply) en able. leave unconnected (float) or pull-up to vr5 to enable, tie to ground to disable. 22 isena0 i positive differential voltage input for phase 0 dcr current sensing. should be routed as a pair with isenb0. should connect to resistor located close to output inductor. see ? current sensing components ? on page 17 . 23 isenb0 i negative differential voltage input for phase 0 dcr curren t sensing. should be routed as a pair with isena0. should be connected to output inductor terminal. see ? current sensing components ? on page 17 . 24 pwml0 o pwm0 gate low signal/drmos enable. configured using bit 10 of user_config command. default is drmos operation. 25 pwmh0 o pwm0 gate high signal. 26 pwmh1 o pwm1 gate high signal. 27 pwml1 o pwm1 gate low signal/drmos enable. configure us ing bit 10 of user_config command. default is drmos operation. 28 isenb1 i negative differential voltage input for phase 1 dcr curren t sensing. should be routed as a pair with isena1. should be connected to output inductor terminal. see ? current sensing components ? on page 17 . 29 isena1 i positive differential voltage input for phase 1 dcr current sensing. should be routed as a pair with isenb1. should connect to resistor located close to output inductor. see ? current sensing components ? on page 17 . 30 vdrv pwr mosfet driver bias supply regulator output. if disabled , this pin can be left floating . decouple with a high quality 4.7f x7r or better ceramic capa citor placed close to this pin. 31 vr6 pwr bypass for internal 6v reference used to power internal circuitry. decouple with a high quality 4.7f x7r or better ceramic capacitor placed close to this pin. keep this net as small as possible. do not route near switching signals. 32 vr5 pwr bypass for internal 5v reference used to power internal circuitry. decouple with a high quality 4.7f x7r or better ceramic capacitor placed close to this pin. 33 vdd pwr supply voltage. decouple with a high quality 1f x7 r or better ceramic capacitor placed close to this pin. 34 iinn i input current monitor negative input. if not used connect to vdd. 35 iinp i input current monitor positive input. if not used connect to vdd 36 v25 pwr bypass for internal 2.5v reference used to power internal circuitry. decouple with a high quality 4.7f x7r or better ceramic capacitor placed close to this pin 9, 11, 37, 38, 39, 43 nc not connected. leave pin floating. 40 xtemp1n i external temperature sensor input for phase1. conn ect to external 2n3904 (base emitter junction) or equivalent embedded thermal diode. if not used connect to sgnd. 41 xtemp1p i external temperature sensor input for phase 1 return. if not used connect to sgnd. 42 en i enable input. active signal enables pwm0 and pwm1 switching. recommended to be tied low during device configuration. refer to ? enable ? on page 16 for additional information. 44 sync m/i/o clock synchronization input. used to set the frequency of the internal clock to sync to an external clock or to outp ut internal clock. when configured as an output, this pin is push-pull and does not require a pull-up. see ? switching frequency setting (sync) ? on page 14 for additional information. pad sgnd pwr exposed thermal pad. connect to low impeda nce ground plane. internal connection to sgnd. note: 1. i = input, o = output, pwr = power or ground, m = multi-mode pins. pin description (continued) pin# pin name type ( note 1 )description
zl8801 8 fn8614.3 march 27, 2015 submit document feedback ordering information part number ( notes 2 , 3 , 4 ) part marking temp. range (c) pack method package (rohs compliant) pkg. dwg. # ZL8801ALAFTK 8801 -40 to +85 tape and reel 1k 44 ld qfn l44.7x7b zl8801alaft7a 8801 -40 to +85 tape and reel 250pc 44 ld qfn l44.7x7b zl8801-2ph-demo1z 2-phase demonstration board. zl8801-4ph-demo1z 4-phase demonstration board. notes: 2. please refer to tb347 for details on reel specifications. 3. these intersil pb-free plastic packaged products employ spec ial pb-free material sets, molding compounds/die attach materials , and 100% matte tin plate plus anneal (e3 termination finish , which is rohs compliant and compatible wi th both snpb and pb-free soldering opera tions). intersil pb-free products are msl classified at pb-fr ee peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jed ec j std-020. 4. for moisture sensitivity level (msl), please see device information page for zl8801 . for more information on msl, please see tech brief tb363 f a a zl8801 t l product designator package designator a = qfn package operating temperature range l = -40c to +85c firmware revision alpha character lead finish f = lead-free matte tin shipping option tk = tape and reel - 1000 pcs t7a = 7 inch tape and reel - 250 pcs
zl8801 9 fn8614.3 march 27, 2015 submit document feedback absolute maximum rating s thermal information dc supply voltage: vdd. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 17v logic i/o voltage: ddc, en, mgn, pg, sa, vdrven, salrt, scl, sda, sync, uvlo, vmon, vset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.0v analog input voltages: vsenp, vsenn, vtrkp, vtrkn, isena0, isena1, isenb0, isenb1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v xtemp0p, xtemp1p . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.0v xtemp0n, xtemp1n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 0.3v iinn, iinp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 17v logic reference : v25 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 3v bias supplies: vr5, vr6, vdrv. . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v pwm logic outputs, pwmh0, pwmh1, pwml0, pwml1 . . . .-0.3v to 6.5v ground voltage differential (vdgnd, vsgnd). . . . . . . . . . . . . . . .-0.3v to +0.3v esd ratings human body model (tested per jesd22-a114e) . . . . . . . . . . . . . . . . 3kv machine model (tested per jesd22-a115-a) . . . . . . . . . . . . . . . . . . 200v charged device model (tested per jesd22-c1010-d) . . . . . . . . . . . . 1kv latch-up (tested per jesd78c; class 2, level a) . . . . . . . . . . . . . . . 100ma thermal resistance (typical) ? ja (c/w) ? jc (c/w) 44 ld qfn package ( notes 6 , 7 ) . . . . . . . . 25 1.5 junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-55c to +150c storage temperature range. . . . . . . . . . . . . . . . . . . . . . . .-55c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see tb493 recommended operating conditions input supply voltage range, vdd . . . . . . . . . . . . . . . . . . . . . . . 4.5v to 14v output voltage range, vout. . . . . . . . . . . . . . . . . . . . . . . . . . . 0.54v to 5.5v operating junction temperature range, t j . . . . . . . . . . . .-40c to +125c ambient temperature range, t a . . . . . . . . . . . . . . . . . . . . . -40c to +85c 5v (vr5) supply total supplied current ( note 8 ) . . . . . . . . . . . . . . . . . 5ma 5v ldo supply (vdrv) ( note 5 ) . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 80ma caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 5. output current is limited by device thermal dissipation. 6. ? ja is measured in free air with the componen t mounted on a high effective thermal conduc tivity test board with ?direct attach? fe atures. see tech brief tb379 . 7. for ? jc , the ?case temp? location is the center of the exposed metal pad on the package underside. 8. total of current used by pull-ups to sda, scl, sa lrt, ddc, en, pg (includi ng push-pull configuration). electrical specifications v dd = 12v. typical values are at t a = +25c. boldface limits apply across the operating ambient temperature range, t a -40c to +85c. parameter test conditions min ( note 14 )typ max ( note 14 )units ic input and bias supply characteristics i dd supply current f sw = 200khz 26 50 ma f sw = 1.33mhz 50 80 ma i dd device disabled current e n = 0v, smbus inactive, v dd = ? 12v, f sw ? = ? 1.33mhz 20 30 ma vr5 reference output voltage v dd > 6v, i < 5ma 4.5 5.0 5.5 v v25 reference output voltage for reference only, vr > 3v 2.25 2.5 2.75 v vr6 reference output voltage for reference only, v dd = 12v 5.5 6.1 6.6 v vdrv 5v output voltage ( note 9 )v dd > 5.5v; 0 to 80ma 4.5 5.25 5.5 v output characteristics output voltage adjustment range v in > v out + 1.1v 0.54 5.5 v output voltage set-point accuracy ( note 11 ) across line, load, te mperature variation -1 1 % v out output voltage set-point resolution ( note 10 ) set using pmbus? command 0.025 % v out output voltage positive sensing bias current vsenp = 4v (negative = sinking) -100 20 100 a output voltage negative sensin g bias current vsenn = 0v 20 a logic input/output characteristics logic input leakage current logic i/o - multi-mode pins -100 100 na logic input low, v il 0.8 v logic input high, v ih 2 v logic output low, v ol 2ma sinking 0.5 v logic output high, v oh 2ma sourcing 2.25 v
zl8801 10 fn8614.3 march 27, 2015 submit document feedback pwm input/output characteristics pwm output low 2ma sinking 0.5 v pwm output high 2ma sourcing 4.25 v oscillator and switching characteristics switching frequency range 200 1334 khz switching frequency set-point accuracy -5 5 % minimum sync pulse width 50% to 50% 150 ns input clock frequency drift tolerance maximum allowed drift of external clock -10 10 % pmbus? clock frequency ( note 12 ) 100 400 khz power management soft-start/ramp characteristics t on delay/t off delay factory default 5 ms t on delay/t off delay range set using pmbus? command 4 5000 ms t on delay/t off delay accuracy turn on, turn off delay -0/+2 ms t on ramp/t off ramp duration factory default (2-phase only) 5 ms t on ramp/t off ramp duration range set using pmbus? command (2-phase only) 5100 ms t on ramp/t off ramp duration accuracy (2-phase only) 250 s tracking vtrk input bias current vtrk = 5v 70 200 a vtrk regulation accuracy 100% tracking, v out ? vtrk (2-phase only) -2 2 % v out power-good power-good v out threshold factory default 90 % v out power-good v out hysteresis factory default 5 % power-good delay applies to turn-on only (low-to-high transition) factory default 1 ms set using pmbus? command 0 5000 ms monitoring and fault management input voltage monitor and fault detection vdd/vin uvlo threshold range 2.85 16 v vdd/vin monitor accuracy full scale (fs) = 14v 2 % fs vdd/vin monitor resolution fu ll scale (fs) = 14v 0.15 % vin uv/ov fault response delay 100 s input current input current sense differential input voltage v iinp to v iinn 020 mv input current sense input offset voltage v iinp to v iinn 100 v input current sense accuracy % of full scale (20mv) 5 % fs output voltage monitor and fault detection vout monitor accuracy fs = vset voltage (v out ) -2 2 % fs vout monitor resolution fs = vset voltage (v out ) 0.15 % fs vout uv/ov fault response delay 10 s output current output current sense input resolution low range 25mv full scale 37.5 v medium range 35mv full scale 56.25 v high range 50mv full scale 75 v electrical specifications v dd = 12v. typical values are at t a = +25c. boldface limits apply across the operating ambient temperature range, t a -40c to +85c. (continued) parameter test conditions min ( note 14 )typ max ( note 14 )units
zl8801 11 fn8614.3 march 27, 2015 submit document feedback output current sense input bias current vout referenced isena0 or isena1 -100 100 na isenb0 or isenb1 -25 25 a output current sense monitor and fault detection iout monitor temperature compensation factory default 3900 ppm/c configurable via pmbus? 100 12700 ppm/c vmon bias monitor and fault detection vmon uvlo threshold range using vmon pin with 16:1 resistor divider 2.85 5 v vmon accuracy ( note 13 ) full scale (fs) = 1.15v -2 2 % fs vmon resolution full scale (fs) = 1.15v 0.15 % fs vmon uv/ov fault response delay 200 s temperature sensing internal temperature sensor internal temperature accuracy tested at +100c -5 5 c internal temperature resolution 1c thermal protection threshold (junction temperature) factory default 125 c configurable via pmbus? -40 125 c thermal protection hysteresis 15 c external temperature sensor: xtemp0 and xtemp1 external temperature accuracy 5 c external temperature resolution 1c thermal protection threshold factory default 125 c configurable via pmbus? -40 125 c thermal protection hysteresis 15 c notes: 9. output current is limited by device thermal dissipation. 10. percentage of full scale (fs) with temperature compensation applied. 11. v out measured at the termination of the vsenp and vsenn sense points. 12. for operation at 400khz, see pmbus? power system management pr otocol specification part 1, se ction 5.2.6.2 for timing parame ter limits. 13. does not include errors due to resistor divider tolerances. 14. compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. electrical specifications v dd = 12v. typical values are at t a = +25c. boldface limits apply across the operating ambient temperature range, t a -40c to +85c. (continued) parameter test conditions min ( note 14 )typ max ( note 14 )units
zl8801 12 fn8614.3 march 27, 2015 submit document feedback zl8801 overview digital-dc architecture overview the zl8801 is an innovative mixed-signal power conversion and power management ic based on intersil patented digital-dc technology that provides an integrated, high performance step-down converter for a wide variety of power supply applications. the zl8801 dc/dc controller is a du al phase controller based on an architecture that does not require loop compensation. adaptive algorithms enable the power converter to automatically change the operating state to increase ef ficiency and overall performance with no user interaction needed. the zl8801 is a full digital loop that achieves precise control of the entire power conversion proc ess with no software required resulting in a very flexible device that is also very easy to use. the chargemode control algorithm is implemented that responds to output current changes within a single pwm switching cycle, achieving a smaller total output voltage variation with less output capacitance than traditional pwm controllers. an extensive set of power management functions are fully integrated and can be configured using simple pin conn ections. the user configuration can be saved in an internal nonvolatile memory (nvram). additionally, all functions can be configured and monitored via the smbus hardware interface using standard pmbus? commands, allowing ultimate flexibility. the zl8801 is compliant with the pmbus? power system management protocol specification part i and ii version 1.2. once enabled, the zl8801 is i mmediately ready to regulate power and perform power management tasks with no programming required. advanced configuration options and real-time configuration change s are available via pmbus? commands if desired and continuous monitoring of multiple operating parameters is possible with minimal interaction from a host controller. integrated subreg ulation circuitry enables single supply operation from any supply between 4.5v and 14v with no bias supplies needed. the zl8801 can be configured by simply connecting its pins according to the tables provid ed in the following sections. additionally, a comprehe nsive set of online tools and application notes are available to help simp lify the design process. an evaluation board is also availa ble to help the user become familiar with the device. this board can be evaluated as a standalone platform using pi n configuration settings. a windows? based gui is also provided to enable full configuration and monitoring capability via the smbus interface and the included usb cable. power management overview the zl8801 incorporates a wide range of configurable power management features that are simple to implement with no external components. additionally, the zl8801 includes circuit protection features that continuous ly safeguard the device and load from damage due to unexpected system faults. the zl8801 can continuously monitor input voltage and current, output voltage and current, internal temperature and the temperature of an external thermal diode. a power-good output signal is also included to enable power-on reset functionality for an external processor. all power management functions ca n be configured using either pin configuration techniques desc ribed in this document or via the smbus interface using pmbus? commands. monitoring parameters can also be preconfigured to provide alerts for specific conditions. ?pmbus? command detail? starting on page 30 , contains a listing of all the pmbus? commands supported by the zl8801 and a deta iled description of the use of each of these commands. multi-mode pins in order to simplify circuit design, the zl8801 incorporates patented multi-mode pins that al low the user to easily configure many aspects of the device with no programming. most power management features can be configured using these pins. the multi-mode pins can respond to four different connections as shown in table 2 . these pins are sampled when power is applied. pin-strap settings: this is the simplest implementation method, as no external components are required. using this method, each pin can take on one of three possible states: low, open, or high. these pins can be connected to the v25 pin for logic high settings (excluding vdrven which sh ould be left floating or tied to vr5). using a single pin, one of three settings can be selected. resistor settings: this method allows a greater range of adjustability when connecting a finite value resistor (in a specified range) between the multi-mode pin and sgnd. standard 1% resistor values are used and only every fourth e96 resistor value is used so the device can reliably recognize the value of resistance connected to the pin while eliminating the error associated with the resistor accuracy. up to 31 unique selections are available using a single resistor. table 2. multi-mode pin configuration pin tied to value low (logic low) <0.8 vdc open (n/c) no connection high (logic high) >2.0 vdc resistor to sgnd set by resistor value figure 4. pin-strap and resistor setting multi-mode pin pin-strap settings resistor settings multi-mode pin logic high open logic low v25
zl8801 13 fn8614.3 march 27, 2015 submit document feedback smbus: almost any zl8801 function can be configured via the smbus interface using standard pmbus? commands. additionally, any value that has been configured using the pin-strap or resistor setting me thods can also be reconfigured and/or verified via the smbus. the ?pmbus? command detail? section, starting on page 30 , explains the use of the pmbus? commands in detail. configurable pins four operating parameters can be set using the pin-strap or resistor setting method: the smbu s address (pin 5, sa), output voltage (pin 10, vset), switching frequency (pin 44, sync) and input voltage undervoltage lockout (pin 13, uvlo). the smbus device address and the output voltage are the only parameters that must be set by external pins. all other device parameters can be set via the smbus. the device address is set using the sa pin. the output voltage is set using the vset pin. smbus device address selection (sa) when communicating with multiple smbus devices using the smbus interface, each device mu st have its own unique address so the host can distinguish be tween the devices. the device address can be set according to the pin-strap options listed in table 3 . the smbus address cannot be changed with a pmbus? command. output voltage and vout_max selection (vset) the output voltage may be set to any voltage between 0.54v and 5.5v provided that the input volt age is higher th an the desired output voltage by at least 1.1v. using the pin-strap method, v out can be set to any of the voltages shown in table 4 . the v out can also be set using a pmbus? command. vout_max is also determined by this pin-strap setting and is 10% greater than the vset voltage setting. vout_max can be set higher than this pin-strap setting using the vout_max pmbus command. table 3. smbus device address selection rsa (k ? ) smbus address rsa (k ? ) smbus address low (sgnd) 26h 42.2 28h open 28h 46.4 29h 10 19h 51.1 2ah 11 1ah 56.2 2bh 12.1 1bh 61.9 2ch 13.3 1ch 68.1 2dh 14.7 1dh 75 2eh 16.2 1eh 82.5 2fh 17.8 1fh 90.9 30h 19.6 20h 100 31h 21.5 21h 110 32h 23.7 22h 121 33h 26.1 23h 133 34h 28.7 24h 147 35h 31.6 25h 162 36h 34.8 26h 178 37h 38.3 27h table 4. rvset (k ? ) v out (v) rvset (k ? ) v out (v) low (sgnd) 1.00 38.3 1.30 open 1.20 42.2 1.40 high (>2.0v) 2.50 46.4 1.50 10 0.60 51.1 1.60 11 0.65 56.2 1.70 12.1 0.70 61.9 1.80 13.3 0.75 68.1 1.90 14.7 0.80 75 2.00 16.2 0.85 82.5 2.10 17.8 0.90 90.9 2.20 19.6 0.95 100 2.30 21.5 1.00 110 2.50 23.7 1.05 121 2.80 26.1 1.10 133 3.00 28.7 1.15 147 3.30 31.6 1.20 162 4.00 34.8 1.25 178 5.00
zl8801 14 fn8614.3 march 27, 2015 submit document feedback switching frequency setting (sync) the device?s switching frequency is set from 200khz to 1333khz using the pin-strap method as shown in table 5 , or by using a pmbus? command. the zl8801 ge nerates the device switching frequency by dividing an internal precision 16mhz clock by integers from 12 to 80. 500khz (n = 32) and 1000khz (n = 16) are not recommended operating frequencies; use 533khz (or 516khz if setting the freque ncy with pmbus) and 1067khz instead. the zl8801 incorporates an internal phase-locked loop (pll) to clock the internal circuitry. the pll can be driven by an external clock source connected to the sync pin. when using the internal oscillator, the sync pin can be configured as a clock source for other intersil digital power devices. the sync pin can also be conf igured as an input. when configured as an input, the device will automatically check for a clock signal on the sync pin each time en is asserted. the zl8801?s oscillator will then sync hronize with the rising edge of the external clock. the incoming clock signal must be in the range of 200khz to 1.33mhz, meet the limits given in the ? logic input/output characteristics ? on page 9 and must be stable when the enable pin (en) is asserted. when using an external clock, the frequencies are not limited to discrete values as when using the internal clock. the external clock signal must not vary more than 10% from its initial value and should have a minimum pulse width of 150ns. in the event of a loss of the external clock signal, the output voltage may show transient overshoot or undershoot. if loss of synchronization occurs, the zl8801 will automatically switch to its internal oscillator and switch at its configured frequency. for this reason, it is important to configure the zl8801 to a frequency close to the expected external clock frequency. the sync pin can also be configured as an output. the device will run from its internal oscillator and will drive the sync pin so other devices can be synchronized to it. the output will conform to the limits given in the ? logic input/output characteristics ? on page 9 . the sync pin will not be checked for an incoming clock signal while in this mode. the switching frequency can be set to any value between 200khz and 1.33mhz using a pmbus? command. the available frequencies below 1.33mhz are defined by f sw = 16mhz/n, where 12 n 80. if a value other than f sw = 16mhz/n is entered using a pmbus? command, the internal circuitry will select the switching frequency value using n as a whole number to achieve a value close to the entered value. for example, if 810khz is entered, the device will select 800khz (n = 20). input voltage undervoltage lockout setting (uvlo) the input undervoltage lockout (uvlo) prevents the zl8801 from operating when the input falls below a preset threshold, indicating the input supply is out of its specified range. the input voltage undervoltage lockout threshold can be set between 2.85v and 16v using the pin- strap method as shown in table 6 . the uvlo can also be set or changed using the vin_uv_fault_limit command. once an input undervoltage fault condition occurs, the user may determine the desired response to the fault condition. the following input undervoltage pr otection response options are available: 1. shut down and stay off until the fault has cleared and the device has been disabled and reenabled. 2. shut down and restart continuously after a delay. the default response from an unde rvoltage fault is to shut down and stay off until the fault has cleared and the device has been disabled and reenabled (see option 1). refer to ? pmbus? command detail ? , starting on page 30 of this document, for details on how to select specific undervoltage fault response options using the vin_uv_fault_response command. when controlling the zl8801 exclusively through the pmbus?, a high voltage setting for uvlo can be used to prevent the zl8801 from being enabled until a lower voltage for uvlo is set using the vin_uv_fault_limit command. table 5. rsync (k ? ) freq (khz) rsync k ? freq (khz) low (sgnd) 200 23.7 471 open 400 26.1 533 high (>2.0v) 1067 28.7 571 10 200 31.6 615 11 222 34.8 727 12.1 242 38.3 800 13.3 267 42.2 842 14.7 296 46.4 889 16.2 320 51.1 1067 17.8 364 56.2 1143 19.6 400 61.9 1231 21.5 421 68.1 1333 table 6. ruvlo (k ? ) uvlo (v) ruvlo (k ? ) uvlo (v) low (sgnd) not used 46.4 7.42 open 4.5 51.1 8.18 high (>2.0v) 10.8 56.2 8.99 26.1 4.18 61.9 9.90 28.7 4.59 68.1 10.90 31.6 5.06 75 12.00 34.8 5.57 82.5 13.20 38.3 6.13 90.9 14.54 42.2 6.75 100 16.00
zl8801 15 fn8614.3 march 27, 2015 submit document feedback internal bias regulators and input supply connections the zl8801 employs internal low dropout (ldo) regulators to supply bias voltages for internal circuitry, allowing it to operate from a single input supply. the in ternal bias regulators are as follows: vr6 : the vr6 ldo provides a regulated 6.1v bias supply for internal circuitry. it is powered from the vdd pin. a 4.7f ceramic x7r filter capacitor to sgnd is required at the vr6 pin. keep this net as small as possibl e and avoid routing this net near any switching signals. vr5 : the vr5 ldo provides a regulated 5.1v bias supply for internal circuitry. it is powered from the vdd pin. a 4.7f ceramic x7r filter capacitor to sgnd is required at the vr5 pin. this supply may be used for to provide a pull-up supply as long as load current does not exceed 5ma. v25 : the v25 ldo provides a regulated 2.5v bias supply for the main controller circuitry. it is powered from an internal 5v node. a 4.7f ceramic x7r filter capacitor to sgnd is required at the v25 pin. the v25 supply is used to power internal ic circuitry. it should only be used externally to set pin-strap pins to the high state. vdrv : the vdrv ldo provides a regulated 5.25v bias supply for external mosfet driver ics or drmos integrated drivers/fets. a 4.7f ceramic x7r filter capacitor to pgnd is required, however, additional capacitance will be needed as specified by the mosfet driver or drmos device selected. the maximum rated output current is 80ma, but device thermal limits must be considered. the power dissipated by the vdrv supply, as shown by equation 1 . where idrv is the current supplied by the vdrv bias supply. the vdrv is enabled by leaving the vdrven unconnected (floating) or connecting it to vr5 and is disabled by connecting vdrven to ground. note: the internal bias regulators, vr6, vr5 and v25, are not designed to be outputs for powering other circuitry. the multi-mode pins may be connected to the v25 pin for logic high settings and the vr5 supply should be used to provide up to 5ma of pull-up current for the sda, scl, salrt, ddc and pg pins. operation with 5v vdd : when operating the zl8801 at voltages below 5.5v, the vr6 and vr5 supplies should be connected directly to v dd for best performance. th e vdrv supply should not be used; the 5v vdd supply should be used instead for powering drmos and mosfet driver ics. start-up procedure the zl8801 follows a specific inte rnal start-up procedure after power is applied to the vdd pin, as shown in figure 6 . the device requires approximately 30ms to check for specific values stored in its internal memory. if the user has stored values in memory, those values will be loaded. once this process is completed, the device is ready to accept commands via the serial interface and the device is ready to be enabled. if the device is to be synchronized to an external clock source, the clock frequency must be stable prior to asserting the en pin. once enabled, the device requires approximately 2ms before its output voltage may be allowed to start its ramp-up process. after the ton_delay period has expired, the output will begin to ramp towards its target voltage according to the preconfigured ton-rise time. the v in should be above the zl8801?s uvlo limit (vin_uv_fault_limit) before the enable pin is driven high. following this sequence will result in the most consistent turn-on delays. when v in is first applied to the zl8801, for example during initial pcb turn-on and test, the enable pin must be held low by some means until the zl8801 configuration file can be loaded. if the enable pin is not held low, then the zl8801 may attempt to turn-on with incorrec t configuration settings, possibly causing circuit failure. vin 5.25v C ?? x idrv (eq. 1) vin vdd vr6 vr5 vin vdd vr6 vr5 4.5v < vin < 5.5v 5.5v < vin < 14v figure 5. figure 6. zl8801 internal start-up procedure input power applied internal memory check 20ms to 30ms device will ignore an enable signal or pmb us commands device ready pre-ramp delay minimum 2ms delay between enable signal and start of output ramp. additional delay may be added with pmbus command
zl8801 16 fn8614.3 march 27, 2015 submit document feedback in those cases where the enable pin cannot be held low during the initial application of power, two options are available: 1. limit v in to 3.0v during initial testing. the zl8801 configuration file can be loaded when v in is as low as 3v. once the configuration file is loaded v in can be increased to the normal input voltage range. 2. use a 100k resistor to set uvlo to 16v. this will keep the zl8801 disabled while the configuration file is loaded. ensure that the vin_uv_fault_limit command is the last command in the configuration file. ton delay and rise times in some applications, it may be necessary to set a delay from when an enable signal is received until the output voltage starts to ramp to its target value. in addition, the designer may wish to precisely set the time required for v out to ramp to its target value after the delay period has expired. the zl8801 gives the system designer the ability to independently control both the delay and ramp time periods. the ton_delay time begins when the en pin is asserted. the ton_delay time is set using the pmbus? command ton_delay. the ton-rise time enables a precisely controlled ramp to the nominal v out value that begins once the ton_delay time has expired. the ramp-up is monotonic and its slope may be precisely set using the pmbus? command ton_rise. the ton_delay and ton_ramp times can be set using pmbus? commands ton_delay an d ton_rise over the serial bus interface. when the ton_delay time is set to 0ms, the device will begin its ramp after the internal circuitry has initialized. the ton_delay and ton_ramp times can be set using pmbus? commands ton_delay and ton_rise over the serial bus interface. when the ton_delay time is set to 0ms, the device will begin its ramp after the internal circuitry has initialized which takes approximately 2ms to complete. the ton_rise time may be set to values less than 2ms, however the ton_rise time should be set to a value greater than 500s to prevent inadvertent fault conditions due to excessive inrush current. a lower ton_rise time limit can be estimated using the formula as shown by equation 2 . where c out is the total output capacitance, v out is the output voltage and limit is the current limit setting for the zl8801. when interdevice current sharing is used (4-, 6- or 8- phases), the output voltage rise time will vary by application. the rise time in this case can be adjusted using the pmbus command multi_phase_ramp_gain. higher gain values produce faster turn-on ramps. typical multi_phase_ramp_gain values range between 1 and 10; the default value is 3. enable the enable pin (en) is used to enable and disable the zl8801. the enable pin should be held low whenever a configuration file or script is used to config ure the zl8801, or a pmbus? command is sent that could pote ntially damage the application circuit. when the zl8801 is used in a self-enabled mode, for example, when en is tied to vr5, or to a resistor divider to v in , the user must consider the zl8801's default factory settings. when a configuration file is used to configure the zl8801, the factory default settings are restored to both the user and default stores in order to set the zl8801 to an initialized state. since the default state of the zl8801 is to be enabled when the enable pin is high, it is possible for the zl8801 to be enabled while the pmbus? commands are sent to the zl8801 during the configuration process. for this re ason self-enabled mode is not recommended for the zl8801. power-good the zl8801 provides a power-good (pg) signal that indicates the output voltage is within a specified tolerance of its target level and no fault condition exists. by de fault, the pg pin will assert if the output is within 10% of the target voltage. these limits may be changed using pmbus? commands. a pg delay period is defined as the time from when all conditions within the zl8801 for asserting pg are met to when the pg pin is actually asserted. this feature is commonly used instead of using an external reset controller to control external digital logic. by default, the zl8801 pg delay is set equal to 1ms. the pg delay may be set using a pmbus? command as described in the ? pmbus? command summary ? on page 25 . power management functional description output overvoltage protection the zl8801 offers an internal output overvoltage protection circuit that can be used to prot ect sensitive load circuitry from being subjected to a voltage higher than its prescribed limits. a hardware comparator is used to compare the actual output voltage (seen at the vsen pins) to a programmable threshold set to 10% higher than the target output voltage (the default setting). if the vsen voltage exceeds th is threshold, the pg pin will deassert and the device can then respond to the following options: 1. shut down and stay off until the fault has cleared and the device has been disabled and reenabled. 2. shut down and restart continuously after a delay. the default response from an overvoltage fault is to shut down and stay off until the fault has cleared and the device has been disabled and reenabled (see option 1). refer to the ?pmbus? command de tail? section, starting on page 30 , for details on how to select specific overvoltage fault response options using the vout_ov_fault_response command. output prebias protection the zl8801 provides prebiased start-up operation. an output prebias condition exists when an externally applied voltage is present on a power supply's output before the power supply's control ic is enabled. certain applications require that the converter not be allowed to sink current during start-up if a prebias condition exists at the output. the zl8801 provides ton_rise = c out *v out (eq. 2)
zl8801 17 fn8614.3 march 27, 2015 submit document feedback prebias protection by sampling the output voltage prior to initiating an output ramp. if a prebias voltage lower than the desired output voltage is present after the ton_delay time, the zl8801 starts switching with a duty cycle that matches the prebias voltage. this ensures th at the ramp-up from the prebias voltage is monotonic. the output voltage is then ramped to the desired output voltage at the ramp rate set by the ton_rise command. the resulting output voltage rise time will vary depending on the prebias voltage, but the total time elapsed from the end of the ton_delay time to when the ton-rise time is complete and the output is at the desired value will match the preconfigured ramp time (see figure 7 ). if a prebias voltage higher than the target voltage exists after the preconfigured ton-delay time and ton-rise time have completed, the zl8801 starts switching with a duty cycle that matches the prebias voltage. this ensures that the ramp down from the prebias voltage is monotonic. the output voltage is then ramped down to the desired output voltage. if a prebias voltage higher than the overvoltage limit exists, the device will not initiate a turn on sequence and will stay off with an output ov fault recorded. output overcurrent protection the zl8801 can protect the power supply from damage if the output is shorted to ground or if an overload condition is imposed on the output. once the current lim it threshold has been selected (see ? current limit configuration ? on page 18 ), the user may determine the desired response to the fault condition. the following overcurrent protection response options are available: 1. shut down and stay off until the fault has cleared and the device has been disabled and reenabled. 2. shut down and restart continuously after a delay. the default response from an over current voltage fault is to shut down and stay off until the faul t has cleared and the device has been disabled and reenabled (see option 1). refer to the ?pmbus? command de tail? section, starting on page 30 , for details on how to select specific overcurrent fault response options using th e iout_oc_faul t_response command. current sensing components the zl8801 uses the inductor dcr current sensing technique. current sensing is achieved by selecting an r/c network as shown in figure 8 . for the voltage across c 1 to reflect the voltage across the dcr of the inductor, the time constant of the inductor must match the time constant of the rc network, as shown in equation 3 : for l, use the average of the nominal value and the minimum value. include the effects of tolerance, dc bias and switching frequency on the inductance when determining the minimum value of l. use the typical room temperature value for dcr . the value of r 1 should be as small as feasible and no greater than 5k for best signal-to-noise ratio. the designer should make sure the resistor package size is appropriate for the power dissipated and include this loss in efficiency calculations. in calculating the minimum value of r 1 , the average voltage across c 1 (which is the average i out , dcr product) is small and can be neglected. therefore, the minimum value of r 1 may be approximated by equation 4 : where p r1 is the maximum power dissipation specification for the resistor. once r1 min has been calculated, solve for the maximum value of c1 from equation 5 : figure 7. output responses to prebias voltages t on delay t on rise desired output voltage prebias voltage v out time t on delay t on rise desired output voltage prebias voltage v out time v prebias < v target v prebias > v target figure 8. dcr current sensing (only 1 phase shown) v out gh gl zl8801 pwmh pwml vdrv bst isena isenb vdd v in r 1 c 1 l driver dcr l c r dcr l rc ? ? ? 1 1 / ? ? r1 min v in v out C ?? v ? out p r1 ---------------------------------------------------------- - ?? ?? ?? = dcr r l c ? ? min max 1 1
zl8801 18 fn8614.3 march 27, 2015 submit document feedback choose the next lowest readily available value (e.g., for c1 max =1.86f, c 1 = 1.5f is a good choice). then substitute the chosen value into the same equation and recalculate the value of r 1 . choose the 1% resistor standard value closest to this recalculated value of r 1 . current limit configuration the zl8801 gives the power supply designer several choices for the fault response during over or undercurrent condition. the user can select the number of violations allowed before declaring fault, a blanking time and the action taken when a fault is detected. these parameters are configured using the isense_config command. the blanking time represents the time when no current measurement is taken. this is to avoid taking a reading just after a switching transition (less accuracy due to potential ringing). it is a configurable parameter from 0 to 832ns. the zl8801 provides an adjustable maximum full scale sensing range. three ranges are ava ilable: 25mv, 35mv and 50mv maximum input voltage. by default, current sensing is enabled during the inductor current down slope period of the switchin g period (d). in applications where the steady state duty cycle is >0.5, for example a 5v to 3.3v converter, the zl8801 can be configured to sense current during the inductor up slope peri od of the switching cycle (d). the user has the option of selecting how many consecutive overcurrent readings must occur before an overcurrent fault and subsequent shutdown are initiated. ei ther 1, 3, 5, 7, 9, 11, 13 or 15 consecutive faults can be selected. once the isense_config parameters have been selected, the user must select the desired cu rrent limit thresholds and the resistance of the sensing element. the current limit thresholds are set with 4 commands: 1. iout_oc_fault_limit ? this sets the overcurrent threshold that must be exceeded by the number of consecutive times chosen in isense_config. 2. iout_uc_fault_limit ? this is the same as iout_oc_fault_limit, but represents the negative current that flows in the lower fet during the d? interval. large negative currents can flow during faults such as when a higher voltage rail is shorted to a lower voltage rail. 3. iout_avg_oc_fault_limit ? this limit is similar to iout_oc_fault_limit, but the limit represents an average reading over several switching cycles. since it is an average, the response time is slower, but the limit can be set closer to the maximum average expected output current. 4. iout_avg_uc_fault_limit ? this limit is similar to iout_avg_oc_fault_limit, but represents the negative current that flows in the lower fet during the d? interval. input current monitor the input current can be monitored through the iinn and iinp pins. the input current monitor input should be connected across a current sensing resistor in seri es with the input supply. the iinp pin is connected to the input supply side of the current sense resistor, the iinn pin is connected to the zl8801 vdd side of the current sense resistor. using the iin_scale command, set the current sense resistor value. se lect the current sense resistor value such that the maximum expected input current times the current sense resistor value does not exceed the maximum current sensing input voltage of 20mv. if this feature is not used, iinn and iinp should be tied to vdd. thermal overload protection the zl8801 includes an on-chip th ermal sensor that continuously measures the internal temperature of the die. this thermal sensor is used to provide both over-temperature and under-temperature protection. if the over-temperature limit is exceeded, or the temperature falls below the under-temperature limit, the zl8801 is shut down. the over-temperature and under-temperature limits are set by the ot_fault_limit and ut_fault_limit respectively. the zl8801 will not attempt to restart until the temperature has fallen below the ot_warn_limit for over-temperature faults or has risen above the ut_warn_limit for under-temperature faults. the default temperature limits are +125c an d -45c, but the user may set the limits to different values if desired. note that setting a higher over-temperature or under-temperature limit may result in permanent damage to the device. once the device has been disabled due to an internal temperature fault, the user may select one of the fault re sponse options as follows: 1. shut down and stay off until the fault has cleared and the device has been disabled and reenabled. 2. shut down and restart continuously after a delay. the default response from an over-temperature or under-temperature fault is to shut down and stay off until the fault has cleared and the device has been disabled and reenabled (see option 1). refer to the ?pmbus? command de tail? section, starting on page 30 , for details on how to select specific over-temperature or under-temperature fault response options using the ot_fault_response and ut_f ault_ response commands. voltage tracking numerous high performance sy stems place stringent demands on the order in which the power supply voltages are turned on. this is particularly true when powering fpgas, asics and other advanced processor devices that require multiple supply voltages to power a single die. in most ca ses, the i/o interface operates at a higher voltage than the core and therefore the core supply voltage must not exceed the i/o supply voltage according to the manufacturers' specifications. the zl8801 integrates a tracking scheme that allows its output to track a voltage that is applied to the vtrk pin with no external components required. the vtrk pin is an analog input that, when tracking mode is enabled, configures the voltage applied to the vtrk pin to act as a reference for the device?s output regulation. tracking can only be used when operating as a 2-phase controller, i.e.; when the device is not part of a current sharing group.
zl8801 19 fn8614.3 march 27, 2015 submit document feedback figure 9 illustrates the typical connection and the two tracking modes: coincident : this mode configures the zl8801 to ramp its output voltage at the same rate as the voltage applied to the vtrk pin. ratiometric . this mode configures the zl8801 to ramp its output voltage at a rate that is a percen tage of the voltage applied to the vtrk pin. the default setting is 50%, but an external resistor string may be used to configure a different tracking ratio. the device that is tracking another ou tput voltage (slave) must be set to its desired steady-state output voltage. the master zl8801 device in a tracking group is defined as the device that has the highest target output voltage within the group. this master device will control the ramp rate of all tracking devices and is not co nfigured for tracking mode. the maximum tracking rise-time is 1v/ms. the slave device must be enabled before the master. any device that is configured for tracking mode will ignore its ton_delay and ton_rise settings and its output will take on the turn-on/turn-off characteristics of the reference voltage present at the vtrk pin. tracking mode can be configur ed by using the track_config command. voltage margining the zl8801 offers a simple means to vary its output higher or lower than its nominal voltage setting in order to determine whether the load device is capable of operating over its specified supply voltage range. margining is controlled through the operation command. default margin limits of v out 5% are preloaded in the factory, but the margin limits can be modi fied through to be as high as 5.5v or as low as 0v. additionally, the transition ra te between the nominal output voltage and either margin limit can be configured using the vout_transition_rate command. external voltage monitoring the voltage monitoring (vmon) pin is available to monitor the voltage supply for the external driver ic. the vmon input must be scaled by a 16:1 ratio in orde r to read-back the vmon voltage correctly. a 100k and 6.65k resistor divider is recommended. overvoltage and undervoltage fault thresholds can be set using mfr_vmon_ov_fault_limit and mfr_ vmon_uv_fault_limit commands. the response to these limits are set using the vmon_ov_fault_response and vmon_ uv_fault_response commands. once the device has been disabled due to vmon fault, the user may select one of the followi ng fault response option: 1. shut down and stay off until the fault has cleared and the device has been disabled and reenabled. 2. shut down and restart continuously after a delay. the default response from an overvoltage or undervoltage vmon fault is to shut down and stay off until the fault has cleared and the device has been disabled and reenabled (see option 1). smbus communications the zl8801 provides a smbus digital interface. the zl8801 can be used with any stan dard 2-wire smbus host device. in addition, the device is compatible with s mbus version 2.0 and includes an salrt line to help mitigate bandwidth limitations related to continuous fault monitoring. pull-up resistors are required on the smbus. the pull-up resistor may be tied to vr5 or to an external 3.3v or 5v supply as long as this voltage is present prior to or during device power-up. the ideal design will use a central pull-up resistor that is well-matched to the total load capacitance. the minimum pull-up resistance should be limited to a value that enables any device to assert the bu s to a voltage that will ensure a logic 0 (typically 0.8v at the de vice monitoring point) given the pull-up voltage (5v if tied to vr5) and the pull-down current capability of the zl8801 (nominal ly 4ma). a pull-up resistor of 10k is a good value for most applications. the smbus data and clock lines sh ould be routed with a closely coupled return or ground plane to minimize coupled interference (noise). excessive noise on the data and clock lines that cause the voltage on these lines to cross the high and low logic thresholds of 2.0v and 0.8v respectively, will cause command transmissions to be interrupted an d result in slow bus operation or missed commands. for less than 10 devices on an smbus, a 10k resistor on each line provides good performance. the zl8801 accepts most standa rd pmbus? commands. when enabling the device with on_off_config command, it is recommended that the enable pin is tied to sgnd. in addition to bus noise considerat ions, it is important to ensure that user connections to the smbus are compliant to the pmbus? command standards. any device that can malfunction figure 9. tracking modes v out v out time coincident ratiometric v track v out time v track v out
zl8801 20 fn8614.3 march 27, 2015 submit document feedback in a way that permanently shor ts smbus lines will disable pmbus? communications. incomplete pmbus? commands can also cause the zl8801 to halt pmbus? communications. this can be corrected by disabling, then reenabling the device. digital-dc bus the digital-dc communications (ddc ) bus is used to communicate between intersil digital power digital-dc devices. this dedicated bus provides the communication channe l between devices for features such as sequencing, fault spread ing and current sharing. the ddc pin must be pulled up to an external 3.3v or 5.0v supply, even if the zl8801 is operating standalone. if the zl8801 is used in a standalone circuit and will not ha ve its ddc pin connected to any other devices, the zl8801 ddc pin can be configured as a push-pull output using the mfr_user_config command and the pull-up resistor can be eliminated. in addition, the ddc pin must be pulled up (or configured as a push-pull output, with the limitations listed previously) before the enable pin is set high. the ddc pin on all digital-dc devices that utilize sequencing, fault spreading or current sharing must be connected together. the ddc pin on all digital-dc devices in an application should be connected together. a pull-up resistor is required on the ddc bus in order to guarantee the rise time as shown by equation 6 : where r pu is the ddc bus pull-up resistance and c load is the bus loading. the pull-up resistor may be tied to vr5 or to an external 3.3v or 5v supply as long as this voltage is present prior to or during device power-up. as a rule of thumb, each device connected to the ddc bus presents approximately 12pf of capacitive loading. the ideal design will use a central pull-up resistor that is well matched to the total load capacitance. in power module applications, the user should consider whether to place the pull-up resistor on the module or on the pcb of the end application. the minimum pull-up resistance should be limited to a value that enables any device to assert the bus to a voltage that will ensure a logic 0 (typically 0.8v at the device monitoring point) given the pull-up voltage (5v if tied to vr5) and the pull-down current capability of the zl8801 (nominally 4ma). as with smbus data and clock lines, the ddc data line should be routed with a closely coupled retu rn or ground plane to minimize coupled interference (noise). ex cessive noise on the ddc signal can cause the voltage on this line to cross the high and low logic thresholds of 2.0v and 0.8v respectively and will cause command transmissions to be inte rrupted and result in slow bus operation or missed commands. fo r less than 10 devices on the ddc bus, a 10k resistor provides good performance. phase spreading when multiple point-of-load converters share a common dc input supply, it is desirable to adjust the clock phase offset of each device such that not all devices have coincident rising edges. setting each converter to start its switching cycle at a different point in time can dramatically reduce input capacitance requirements. since the peak current drawn from the input supply is effectively spread out over a period of time, the peak current drawn at any given moment is reduced and the power losses proportional to i rms 2 are reduced. in order to enable phase spread ing, all converters must be synchronized to the same switching clock. configuring the sync pin is described in the configuration pin on page 6 the zl8801 will automatically offset the phase of parallel connected zl8801s in a current sharing group. selecting the phase offset for the device is accomplished by selecting a device address according to equation 7 : this behavior is illustrated in table 7 . : the phase offset of each device may also be set to any value between 0 and 360 in 22.5 increments using the interleave pmbus? command. output sequencing a group of intersil digital power devices may be configured to power-up in a predetermined sequence. this feature is especially useful when powering advanced processors, fpgas and asics that require one supply to reach its operating voltage prior to another supply reaching its operating voltage in order to avoid latch-up from occurring. multi-device sequencing can be achieved by configuring each device using the sequence pmbus? command. multiple device sequencing is achieved by issuing pmbus? commands to assign the preced ing device in the sequencing chain as well as the device that will follow in the sequencing chain. the enable (en) pins of all devices in a sequencing group must be tied together and driven high to initiate a sequenced turn on of the group. enable must be driven low to initiate a sequenced turn off of the group. the ddc pins of all devices in a sequencing group must be connected together to ensure accurate sequencing. sequencing can also be accomplished by connecting the enable pin of a sequel device to the power-good pin of a prequel device. sequencing is also achieved by using the ton_delay and ton_rise commands and choosing appropriate delay and rise durations such that sequel devices start after their associated prequel devices. the drawback to this method is that if a prequel device fails to start properly, its sequel device will still start and ramp on according to its delay an d rise time settings. the best sequencing performance is achieved by using the sequence command and tying the enable and ddc pins of the sequencing rise time r pu ? c load 1 ? s ? ?? = (eq. 6) table 7. address lsb phase offset () address lsb phase offset () 00 80 145 945 290 a90 3135 b135 4 180 c 180 5 225 d 225 6270 e270 7315 f315 phase offset device address 45 ?? = (eq. 7)
zl8801 21 fn8614.3 march 27, 2015 submit document feedback group devices together. if the ddc pins of the devices are not connected together and the user depends on ton_delay and toff_delay values alone to ensu re device sequencing, timing accuracy will suffer. this is due to the 0ms to 4ms delay variability between zl8801 devices. fault spreading digital-dc devices can be config ured to broadcast a fault event over the ddc bus to the other devices in the group. when a fault occurs and the device is configured to shut down on a fault, the device will shut down and broadc ast the fault event over the ddc bus. the other devices on the ddc bus will shut down together if configured to do so, and will attempt to restart in their prescribed order if configured to do so. active current sharing the pwm outputs of the zl8801 are used in parallel to create a dual phase power rail. the device outputs will share the current equally within a few percent, assuming all external sensing element variations and tolerances are negligible. current sensing element tolerances must be taken into account, or adjusted for using the iout_cal_gain and io ut_cal_offset commands in any application. figure 10 shows a typical connection for a dual phase converter. the zl8801 will current share between phases without utilizing output voltage droop. droop resistance is used in 4-, 6- and 8-phase current sharing to add artificial resistance in the ou tput voltage path to control the slope of the load line curve, calibrating out the physical parasitic mismatches due to power train components and pcb layout. when current sharing up to 4 sets of zl8801s (8 phases total), the zl8801 uses a low-bandwidth, first-order digital current sharing technique to balance the unequal device output loading by aligning the load lines of member devices to a reference device. upon system start-up, the lowest numbered phase is defined as the reference phase and all othe r phases are member phases. the reference phase broadcasts its current over the ddc bus. the member phases use the reference current information to trim their reference voltages (v member ) to balance the current loading of each device in the system. figure 11 shows that, for load lines with identical slopes, the member reference voltage is increased towards the reference voltage, which closes the gap between the inductor currents. the relation between reference and member current and voltage is given by equation 8 : where r is the value of the droop resistance. the ishare_config command is used to configure the device for active current sharing. the default setting is a standalone non current sharing, two-phase device . a current sharing rail can be part of a system sequencing group. a 4-, 6- or 8-phase current sharing group must have their ddc and sync pins tied together in order to achieve current sensing and accurate phase offsets between current sharing phases. temperature monitoring using xtemp pin the zl8801 supports measuremen t of an external device temperature using either a thermal diode integrated in a processor, fpga or asic, or us ing a discrete diode-connected 2n3904 npn transistor. figure 12 illustrates the typical connections required. a noise filtering capacitor, not exceeding 100pf, may be connected close to the zl8801 xtemp pins for long or noisy trace runs. the external temperature sensors can be used to provide the temperature reading for over-temperature and under-temperature faults. the external sensors can also be used to provide more accurate temperature compensation for inductor dcr current sensing by being placed close to the inductor. when routing the xtem p signals between the inductor and the zl8801, these pcb traces should be kept away from the switch node; (node connected the inductor to the mosfet switches). figure 10. dual phase simplified circuit v out zl8801 vi n v in driver driver -r -r v reference v member i member i reference i out v out figure 11. active current sharing ?? member reference out member i i r v v ? ? ? ?
zl8801 22 fn8614.3 march 27, 2015 submit document feedback nonvolatile memory (nvram) and security features the zl8801 has internal nonvolatile memory where user configurations are stored. integr ated security measures ensure that the user can only restore the device to a level that has been made available to them. during the initialization process, the zl8801 checks for stored values contained in its internal nonvolatile memory. the zl8801 offers two internal memory storage units that are accessible by the user as follows: user store : the user store is the most commonly used store. it provides the ability to modify certain power supply settings while still protecting the equipment from modifying values that can lead to a system level fault. the equipment manufacturer would use the user store to achieve this goal. default store : the default store is less commonly used. it provides a means to protect the circuit from damage by preventing the user from modifying certain values that are related to the physical construction of the circuit. in this case, the original equipment manufacturer (oem) would use the ?default store? in a protected mode and allow the user to restore the device to its default settings. in this case, the ?user store? would be available to the end-user for making changes, but would restrict the user from restoring the device to the factory settings or modifying the default store. the ?user store? takes priority ov er the ?default store?. if there are no values set in the ?user or default store?, then the device will use the pin-strap setting value. for details regarding protection of the user and default stores, see the password pmbus command. dc/dc converter design the zl8801 operates as a voltage-mode, synchronous buck converter with a selectable constant frequency pulse width modulator (pwm) control scheme that uses external driver, mosfets, capacitors and an inductor to perform power conversion. dual output pwm per phase the zl8801 has been designed to provide independent upper and lower fet drive signals to a 2 input mosfet driver such as the zl1505. the zl8801 utilizes adaptive deadtime control to improve the power conversion efficiency. the zl8801 monitors the power converter?s operating conditions and continuously adjusts the turn-on and turn-off timing of the high-side and low-side driver input signals to optimize the overall efficiency of the power supply. the zl8801 can also be used with single-ended drmos integrated driver and mosfet devices. the drmos device or single-ended mosfet driver must have a fast-acting enable pin. power supplies using drmos devi ces can be made smaller than discrete solutions utilizing separate drivers and mosfets, but at a slightly lower efficiency. the option to use drmos or drivers and discrete mosfets is set using the user_config command. power train component selection the zl8801 is a dual phase synchronous buck converter that uses external drivers, mosfets, inductors and capacitors to perform the power conversion proc ess. the proper selection of the external components is critical for optimized performance. to select the appropriate external components for the desired performance goals, the power supply requirements listed in table 8 must be known. design goal trade-offs the design of the buck power stage requires several compromises among size, efficiency and cost. the inductor core loss increases with frequency, so there is a trade-off between a small output filter made possible by a higher switching frequency and getting better power supply efficiency. size can be decreased by increasing the switching frequency at the expense of efficiency. cost can be minimized by using through-hole inductors and capacitors; however these components are physically large. figure 12. external temperature monitoring zl xtempxn xtempxp discrete npn 2n3904 zl xtempxn xtempxp embedded thermal diode p fpga dsp asic 100pf 100pf table 8. power supply requirements parameter example value input voltage (v in )12v output voltage (v out )1.2v output current (i out ) 30a output voltage ripple (v orip )1% of v out output load step (i ostep ) 50% of i o output load step rate 10a/s output deviation due to load step 2% maximum pcb temperature +85c desired efficiency 90% other considerations optimize for small size
zl8801 23 fn8614.3 march 27, 2015 submit document feedback to start the design, select a switching frequency based on table 9 . this frequency is a starting point and may be adjusted as the design progresses. inductor selection the output inductor selection process must include several trade-offs. a high inductance value will result in a low ripple current ( i l ), which will reduce output capacitance and produce a low output ripple voltage, but may also compromise output transient load performance. therefore, a balance must be struck between output ripple and optima l load transient performance. a good starting point is to select the output inductor ripple equal to 30% to 50% of the maximum output current (i out ). i l = 0.5*i out now the output inductance can be calculated using equation 9 , where v in is the input voltage: the average inductor current is equal to the maximum output current. the peak inductor current (i lpk ) is calculated using equation 10 , where i out is the maximum output current: select an inductor rated for the average dc current and with saturation current rating above the peak current calculated. once an inductor is selected, the dcr and core losses in the inductor are calculated. use the dcr specified in the inductor manufacturer?s datasheet, as shown in equation 11 : i lrms is given by equation 12 : where i out is the maximum output current. next, calculate the core loss of the selected induct or. since this calculation is specific to each inductor and manufacturer, refer to the chosen inductor datasheet. add the core loss and the esr loss and compare the total loss to the maximum power dissipation recommendation in the inductor datasheet. output capacitor selection several trade-offs must also be considered when selecting an output capacitor. low esr values are needed to have a small output deviation (v step ) during transient load steps and low output voltage ripple ( v). however, capacitors with low esr, such as x5r and x7r dielectric ceramic capacitors, also have relatively low capacitance values. many designs can use a combination of high capacitance devices and low esr devices in parallel. for high ripple currents, a low capacitance value can cause a significant amount of output voltage ripple. likewise, in high transient load steps, a relatively large amount of capacitance is needed to minimize the output voltage deviation while the inductor current ramps up or down to the new steady state output current value. as a starting point, apportion one-half of the output ripple voltage to the capacitor esr and the other half to capacitance, as shown in equations 13 and 14 : use these values to make an init ial capacitor selection, using a single capacitor or several capacitors in parallel. after a capacitor has been selected, the resulting output voltage ripple can be calculated using equation 15 : because each part of this equation was made to be less than or equal to half of the allowed output ripple voltage, the v should be less than the desired maximum output ripple. chargemode control achieves a fast-acting, low deviation transient response by detecting and reacting to very small variations in the output voltage. chargemode control performance is optimized when v due to capacitor ripple is 1% or less of the output voltage. input capacitor it is highly recommended that dedicated input capacitors be used in any point-of-load design, even when the supply is powered from a heavily filtered 5v or 12v ?bulk? supply from an off-line power supply. this is because of the high rms ripple current that is drawn by the buck converter topology. this ripple (i inrms ) can be determined from equation 16 : without capacitive filtering near the power supply circuit, this current would flow through the supply bus and return planes, coupling noise into other system circuitry. the input capacitors should be rated above the ripple current calculated above and the maximum expected input voltage. table 9. circuit design considerations frequency range efficiency circuit size 200 to 400khz highest larger 400 to 800khz moderate smaller 800khz to 1.33mhz lower smallest l sw in out out i f v v v l ? ? ? ? ? ? ? ? ? ? ? ? ? 1 2 i i i out lpk ? ? 2 lrms ldcr i dcr p ? ? ?? 12 2 2 l out lrms i i i ? ? ? 2 8 v f i c sw l out ? ? ? ? ? l i v esr ? ? ? ? 2 out sw l l c f i esr i v ? ? ? ? ? ? ? ? 8 d i i out inrms ? ?
zl8801 24 fn8614.3 march 27, 2015 submit document feedback ql selection the bottom or lower mosfet should be selected with the lowest possible r ds(on) while maintaining the desired circuit size and cost. calculate the rms current in ql as shown by equation 17 : calculate the power dissipated due to r ds(on) as shown in equation 18 : note: r ds(on) given in the manufacturer?s datasheet is measured at +25c. the actual r ds(on) in the end-use application will be much higher. select a candidate mosfet and calculate the required gate drive current using equation 19 : mosfets with lower r ds(on) tend to have higher gate charge requirements, which increases the current and resulting power required to turn them on and off. qh selection in addition to the r ds(on) loss and gate charge loss, qh also has switching loss. select qh with a lower gate charge, keeping in mind that qh?s r ds(on) will be higher as a result. as was done with ql, calculate the rms current using equations 20 and 21 : next, calculate the switching time using equation 22 : where q g is the gate charge of the selected qh and i dr is the peak gate drive current available from the gate drive ic. to calculate the switching time, use the zl1505s minimum guaranteed drive current of 3a for a conservative design. using the calculated switching time, calculate the switching power loss in qh using equation 23 : the total power dissipated by qh is given by equation 24 : mosfet thermal check once the power dissipations for qh and ql have been calculated, the mosfet?s junction temperature can be estimated. using the junction to case thermal resistance (r th ) given in the mosfet manufacturer?s datasheet and the expected maximum printed circuit board temperature, calc ulate the junction temperature using equation 25 : to calculate power losses and junction temperature rise in drmos devices, consult the datasheet and application notes for the drmos device selected. efficiency optimized driver deadtime control the zl8801 utilizes a closed loop algorithm to optimize the deadtime applied between the gate drive signals for the top and bottom fets. in a synchronous buck converter, the mosfet drive circuitry must be designed such that the top and bottom mosfets are never in the conduc ting state at the same time. potentially damaging currents flow in the circuit if both top and bottom mosfets are simultaneously on for periods of time exceeding a few nanoseconds. conversely, long periods of time in which both mosfets are off, reduce overall circuit efficiency by allowing current to flow in their parasitic body diodes. it is therefore advantageous to minimize this deadtime to provide optimum circuit efficiency. in th e first order model of a buck converter, the duty cycle is determined by equation 26 : however, nonidealities exist that cause the real duty cycle to extend beyond the ideal. deadtime is one of those nonidealities that can be manipulated to improve efficiency. the zl8801 has an internal algorithm that constantly adjusts deadtime nonoverlap to minimize duty cycle, thus maximizing efficiency. this circuit will null out deadtime differences due to component variation, temperature and loadin g effects. this algorithm is independent of application circuit parameters such as mosfet type, gate driver delays, rise and fall times and circuit layout. in addition, it does not require drive or mosfet voltage or current waveform measurements. adaptive deadtime is enabled using the deadtime_config pmbus? co mmand. adaptive deadtime is only effective when a discrete driver (such as the zl1505) and mosfets are used. when drmos devices are selected using user_config, adaptive deadtime is automatically disabled. deadtime minimum and maximum limits can be set using the deadtime pmbus? command. monitoring via smbus a system controller can monitor a wide variety of different zl8801 parameters through the smbus interface. the device can monitor for fault conditions by monitoring the salrt pin, which will be asserted when any number of preconfigured fault conditions occur. d i i out qlrms ? ? ? 1 p ql r ds on ?? i botrms ?? 2 = (eq. 18) g sw g q f i ? ? d i i out qhrms ? ? p qh r ds on ?? i qhrms ?? 2 = (eq. 21) dr g sw i q t ? sw out sw inm swtop f i t v p ? ? ? ? swtop qh qhtot p p p ? ? ?? th q pcb j r p t t ? ? ? max in out v v d ?
zl8801 25 fn8614.3 march 27, 2015 submit document feedback the device can also be monitored continuously for any number of power conversion parameters including but not limited to the following: ?input voltage ?output voltage ?input current ? output current ? internal junction temperature ? temperature of an external device ?switching frequency ? duty cycle ? fault status information the pmbus? host should respond to salrt as follows: 1. zl device pulls salrt low. 2. pmbus? host detects that salrt is now low, performs transmission with alert respon se address to find which zl device is pulling salrt low. 3. pmbus? host talks to the zl device that has pulled salrt low. the actions that the host performs are up to the system designer. if multiple devices are faulting, salrt will still be low after doing the above steps and will require transmission with the alert response address repeatedly until all faults are cleared. please refer to the ?pmbus? comm and detail? section, starting on page 30 , for details on how to monitor specific parameters via the smbus interface. pmbus? command summary code command name description type data format default value default setting 01h operation enable/disable, margin settings. r/w bit 00h immediate off, nominal margin 02h on_off_config on/off configure settings. r/w bit 17h enable pin control, active high 03h clear_faults clears faults. write n/a n/a n/a 11h store_default_all stores values to default store. write n/a n/a n/a 12h restore_default_all restores values from default store. write n/a n/a n/a 15h store_user_all stores values to user store. write n/a n/a n/a 16h restore_user_all restores values from user store. write n/a n/a n/a 20h vout_mode reports vout_command mode value. read bit 13h 13h, fixed value 21h vout_command sets nominal v out setpoint. r/w l16u pin-strap setting 23h vout_cal_offset applies offset voltage to v out setpoint. r/w l16u 0000h 0v 24h vout_max sets maximum v out setpoint. r/w l16u 1.10 x vout_command pin-strap setting 25h vout_margin_high sets v out set point during margin high. r/w l16u 1.05 x vout_command pin-strap setting 26h vout_margin_low sets v out setpoint during margin low. r/w l16u 0.95 x vout_command pin-strap setting 27h vout_transition_rate sets v out transition rate during margin commands. r/w l11 ba00h 1v/ms 28h vout_droop sets v/i slope for total rail output current (all phases combined). r/w l11 0000h 0mv/a 33h frequency_switch sets switching frequency. r/w l11 pin-strap setting 37h interleave configures phase offset during group operation. r/w bit set by pin-strapped pmbus? address 40h vout_ov_fault_limit sets the v out overvoltage fault threshold. r/w l16u 1.15 x vout_command pin-strap setting 41h vout_ov_fault_response sets the v out overvoltage fault response. r/w bit 80h disable, no retry 44h vout_uv_fault_limit sets the v out undervoltage fault threshold. r/w l16u 0.85 x vout_command pin-strap setting 45h vout_uv_fault_response sets the v out undervoltage fault response. r/w bit 80h disable, no retry 46h iout_oc_fault_limit sets the i out peak overcurrent fault threshold for each phase. r/w l11 dbc0h 30a
zl8801 26 fn8614.3 march 27, 2015 submit document feedback 4bh iout_uc_fault_limit sets the i out valley undercurrent fault threshold for each phase. r/w l11 d440h -15a 4fh ot_fault_limit sets the over-tempe rature fault limit. r/w l11 ebe8h +125 ? c 50h ot_fault_response sets th e over-temperature fault response. r/w bit 80h disable, no retry 51h ot_warn_limit sets the over-temperature warning limit. r/w l11 eb70h +110c 52h ut_warn_limit sets the under-temperature warning limit. r/w l11 dc40h -30c 53h ut_fault_limit sets the under-temper ature fault limit. r/w l11 e530h -45c 54h ut_fault_response sets the under-temperature fault response. r/w bit 80h disable, no retry 55h vin_ov_fault_limit sets the v in overvoltage fault threshold. r/w l11 d380h 14v 56h vin_ov_fault_response sets the v in overvoltage fault response. r/w bit 80h disable, no retry 57h vin_ov_warn_limit sets the v in overvoltage warning threshold. r/w l11 d360h 13.5v 58h vin_uv_warn_limit sets the v in undervoltage warning threshold. r/w l11 n/a 1.1 x vin_uv_fault_limit pin-strap setting 59h vin_uv_fault_limit sets the v in undervoltage fault threshold. r/w l11 n/a pin-strap setting 5ah vin_uv_fault_response sets the v in undervoltage fault response. r/w bit 80h disable, no retry 5eh power_good_on sets the voltage threshold for power-good indication. r/w l16u n/a 0.9 x vout_command pin-strap setting 60h ton_delay sets the delay time from enable to v out rise. r/w l11 ca80h 5ms 61h ton_rise sets the rise time of v out after enable and ton_delay. r/w l11 ca80h 5ms 64h toff_delay sets the delay time from disable to start of v out fall. r/w l11 ca80h 5ms 65h toff_fall sets the fall time for v out after disable and toff_delay. r/w l11 ca80h 5ms 78h status_byte first byte of status_word. read bit 0000h no faults 79h status_word summary of critical faults. read bit 0000h no faults 7ah status_vout reports v out warnings/faults. read bit 00h no faults 7bh status_iout reports i out warnings/faults. read bit 00h no faults 7ch status_input reports input warn ings/faults. read bit 00h no faults 7dh status_temperature reports temperatur e warnings/faults. read bit 00h no faults 7eh status_cml reports communication, memory, logic errors. read bit 00h no errors 80h status_mfr_specific reports voltage monitoring/clock synchronization faults. read bit 00h no faults 88h read_vin reports input voltage measurement. read l11 n/a n/a 89h read_iin reports input current measurement. read l11 n/a n/a 8bh read_vout reports output voltage measurement. read l16u n/a n/a 8ch read_iout reports output total current measurement. read l11 n/a n/a 8dh read_temperature_1 reports internal temperature measurement. read l11 n/a n/a pmbus? command summary (continued) code command name description type data format default value default setting
zl8801 27 fn8614.3 march 27, 2015 submit document feedback 8eh read_temperature_2 reports external temperature 0 measurement. read l11 n/a n/a 8fh read_temperature_3 reports external temperature 1 measurement. read l11 n/a n/a 94h read_duty_cycle reports actual duty cycle. read l11 n/a n/a 95h read_frequency reports actual switching frequency. read l11 n/a n/a 98h pmbus_revision returns the revision of the pmbus specification to which the device is compliant. read bit 11h part 1 revision 1.2, part 2 revision 1.2 99h mfr_id sets a user defined identification. r/w asc n/a 9ah mfr_model sets a user defined model. r/w asc n/a 9bh mfr_revision sets a user defined revision. r/w asc n/a 9ch mfr_location sets a user defined location identifier. r/w asc n/a 9dh mfr_date sets a user defined date. r/w asc n/a a1h read_iout0 reports phase 0 output current. read l11 n/a n/a a2h read_iout1 reports phase 1 output current. read l11 n/a n/a a8h legacy_fault_group configures fault group compatibility with older intersil digital power devices. r/w bit n/a adh ic_device_id reports device identification information. block read cus 49a02300h intersil, zl8801 aeh ic_device_rev reports device revision information. block read cus 01000000h initial release b0h user_data_00 sets a user defined data. r/w asc n/a bfh deadtime_max sets the max deadtime value for the adaptive deadtime. r/w bit 3838h 56ns/56ns cah iout0_cal_gain sets impedance of phase 0 current sense circuit. r/w l11 aa66h 0.3m cbh iout1_cal_gain sets impedance of phase 1 current sense circuit. r/w l11 aa66h 0.3m cch iout0_cal_offset sets an offset to iout0 sense circuit. r/w l11 0000h 0a cdh iout1_cal_offset sets an offset to iout1 sense circuit. r/w l11 0000h 0a ceh min_vout_reg sets a minimum st art-up voltage. r/w l11 f258h 150mv d0h isense_config configures current sensing circ uitry. r/w bit 4204h downslope, 5 fault count, 256ns blanking, low range d1h user_config configures several user-level feat ures. r/w bit 0402h enable xtemp0,1, pg open drain, drmos enabled d2h iin_cal_gain sets the resistance of the input current sensing resistor r/w l11 c200h 2m d3h ddc_config configures the ddc addressing and current sharing. r/w bit n/a set by pin-strapped pmbus? address d4h power_good_delay sets the delay between pg threshold and pg assertion. r/w l11 ca00h 4ms d5h multi_phase_ramp_gain adjusts the ramp-up and ramp-down rate by setting the feedback gain. r/w cus 03h gain of 3 d6h inductor sets the inductance of both phases. r/w l11 b23dh 0.56h d7h vout_margin_ratio % margin_high, low above/below vout_command. r/w l11 ca80h 5% d8h ovuv_config configures output voltage ov/uv fault detection. r/w bit 00000000h low-side fet off on fault, 1 violation triggers fault. pmbus? command summary (continued) code command name description type data format default value default setting
zl8801 28 fn8614.3 march 27, 2015 submit document feedback d9h xtemp_scale calibrates external temperature sensor. r/w l11 ba00h 1/c dah xtemp_offset offset calibration for external temperature sensor. r/w l11 0000h no offset dch tempco_config sets tempco settings. r/w bit 27h 3900ppm/c ddh deadtime sets default deadtime settings. r/w cus 1010h 16ns/16ns deh deadtime_config configures the adaptive deadtime optimization mode. r/w bit 8888h adaptive deadtime enabled, 8ns/8ns dfh ascr_config configures the ascr setting s. r/w bit 015a0190h ascr enabled, 400 gain, 90 residual e0h sequence ddc rail sequencing configur ation. r/w bit 00h prequel and sequel disabled e1h track_config configures voltage tracking modes. r/w bit 00h tracking disabled e2h ddc_group configures group id, fault spreading, operation and v out . r/w bit 000000h ignore broadcast, sequenced shutdown, fault spreading e4h device_id returns the device identifier string. block read asc n/a e5h mfr_iout_oc_fault_response configures the i out overcurrent fault response. r/w bit 80h disable, no retry e6h mfr_iout_uc_fault_response configures the i out undercurrent fault response. r/w bit 80h disable, no retry e7h iout_avg_oc_fault_limit sets the i out average overcurrent fault threshold for each phase. r/w l11 da80h 20a e8h iout_avg_uc_fault_limit sets the i out average undercurrent fault threshold for each phase. r/w l11 d580h -10a e9h mfr_user_config sets options pertaining to advanced features. r/w bit 0000h numerous device settings eah snapshot 32 byte read-back of parametric and status values. block read bit n/a ebh blank_params indicates recently saved parameter values. block read bit ff?ffh f3h snapshot_control snapshot feature control command. r/w bit 00h n/a f4h restore_factory restores device to the hard-coded default values. write n/a n/a n/a f5h mfr_vmon_ov_fault_limit sets the vmon overvoltage fault threshold. r/w l11 d300h 12v f6h mfr_vmon_uv_fault_limit sets the vmon undervoltage fault threshold. r/w l11 ca00h 4.0v f7h mfr_read_vmon reads the vmon voltage. read l11 n/a n/a f8h mfr_vmon_ov_fault_response configures the vmon overvoltage fault response. r/w bit 80h disable, no retry f9h mfr_vmon_uv_fault_response configures the vmon undervoltage fault response. r/w bit 80h disable, no retry fah security_level reports the security level. read hex 01h public security level fbh private_password sets the private password string. r/w asc 00?00h fch public_password sets the public password string. r/w asc 00?00h fdh unprotect identifies which commands are protected. r/w custom ff?ffh n/a pmbus? command summary (continued) code command name description type data format default value default setting
zl8801 29 fn8614.3 march 27, 2015 submit document feedback pmbus? user guidelines the pmbus is a powerful tool that allows the user to optimize circuit performance by configuring the zl8801 for their applicati on. when configuring the zl8801 in a circuit, the zl8801 should be disabl ed whenever most settings are ch anged with pmbus commands. some exceptions to this recommendation are operation, on_off_config, clear_faults, vout_command, vout_margin_high, vout_margin_low and asccr_config. while the device is enabled any command can be read. many commands do not take effect until after the device has been reenabled, hence the recommendati on that commands that change device settings are written while the device is disabled. summary : all commands can be read at any time. always disable the zl8801 when writing commands that change device settings. exceptions to this rule are commands intended to b e written while the device is enabled, for example, vout_margin_high. to be sure a device setting change has taken effect, write the store_user_all command, then cycle input power and reenable the device. pmbus? data formats linear-11 (l11) l11 data format uses 5-bit two?s compliment exponent (n) and 11-b it two?s compliment mantissa (y) to represent real world decim al value (x). relation between real world decimal value (x), n and y is: x = y x 2 n linear-16 unsigned (l16u) l16u data format uses a fixed exponent (hardcode to n = -13h) an d a 16-bit unsigned integer mant issa (y) to repr esent real worl d decimal value (x). relation between real world decimal value (x), n and y is: x = y x 2 -13 linear-16 signed (l16s) l16s data format uses a fixed exponent (hardcode to n = -13h) and a 16-bit two?s compliment mantissa (y) to represent real worl d decimal value (x). relation between real world decimal value (x), n and y is: x = y x 2 -13 bit field (bit) breakdown of bit field is provided in ?pmbu s? command detail? section, starting on page 30 . custom (cus) breakdown of custom data format is provided in ?pmbus? command detail? section, starting on page 30 . a combination of bit field and integer are common types of custom data format. ascii (asc) a variable length string of text characters uses ascii data format. data byte high data byte low exponen t ( n )mantissa ( y ) 76543210 76543210
zl8801 30 fn8614.3 march 27, 2015 submit document feedback pmbus? command detail operation (01h) definition: sets enable, disable and vout margin settings. data values of operation that force margin high or low only take effect when the mgn pin is left open (i.e., in the nominal margin state) . this command can also be moni tored to read the operating sta te of the device on bits 7:6. writing immediate off will turn off th e output and ignore toff_delay and toff_fall settings. this comma nd is not stored like other pmbus commands. the value read reflects the current state of the device. when this command is written, th e command takes effect. if a store _user_all written and the devi ce is reenabled, the operation settings may not be the same settings that were written before the device was reenabled. data length in bytes: 1 data format: bit field type: r/w protectable: yes default value: 00h (immediate off) units: n/a command operation (01h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 00000000 bits 7:6 bits 5:4 bits 3:0 (not used) unit on or off margin state 00 00 0000 immediate off (no sequencing) n/a 01 00 0000 soft-off (with sequencing) n/a 10 00 0000 on nominal 10 01 0100 on margin low 10 10 0100 on margin high note: bit combinations not listed above may cause command errors.
zl8801 31 fn8614.3 march 27, 2015 submit document feedback on_off_config (02h) definition: configures the interpretation and coordination of the operat ion command and the enable pin (en). when bit 0 is set to 1 (turn-off the output immediately) toff_d elay and toff_fall settings are ignored. data length in bytes: 1 data format: bit field type: r/w protectable: yes default value: 17h (enable pin control, active high, turn off output immediately ? no ramp down) units: n/a clear_faults (03h) definition: clears all fault bits in all registers an d releases the salrt pin (if asserted) simu ltaneously. if a fault condition still exi sts, the bit will reassert immediately. this command will not restart a device if it has shut down, it will only clear the faults. data length in bytes: 0 byte data format: n/a type: write only protectable: yes default value: n/a units: n/a store_default_all (11h) definition: stores all current pmbus? values from the operating memory into the nonvolatile (nvram) default store memory. to clear the default store, perform a restore_factory then store_default_all. to add to the default store, perform a restore_default_all, write commands to be added, then store_default_all. this co mmand should not be used during device operation, the device will be unresponsive for 20ms while storing values. data length in bytes: 0 data format: n/a type: write only default value: n/a units: n/a command on_off_config (02h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 00010111 bit number purpose bit value meaning 7:5 not used 000 not used 4:2 sets the default to ei ther operate any time power is present or for the on/off to be controlled by enable pin or operation command 000 not used 101 device starts from enable pin only. 110 device starts from operation command only. 1not used 0 not used 0 enable pin action when commanding the unit to turn off 0 use the configured ramp down settings. 1 turn off the output immediately.
zl8801 32 fn8614.3 march 27, 2015 submit document feedback restore_default_all (12h) definition: restores pmbus? settings from the nonvolatile (nvram) defaul t store memory into the operating memory. these settings are loaded during at power-up if not superseded by settings in user store. security level is changed to level 1 following this command. this command should not be used during device operation, th e device will be unresponsive for 20ms while restoring values. data length in bytes: 0 data format: n/a type: write only default value: n/a units: n/a store_user_all (15h) definition: stores all pmbus? settings from the operating memory to th e nonvolatile (nvram) user store memory. to clear the user store, perform a restore_factory then store_user_all. to add to the user store, perform a restore_user_all, write commands to be added, then store_user_all. this command should not be used during device operation, the device will be unresponsive for 20ms while storing values. data length in bytes: 0 data format: n/a type: write only default value: n/a units: n/a restore_user_all (16h) definition: restores all pmbus? settings from the user store memory to the operating memory. security level is changed to level 1 following this command. this comm and should not be used during device operation, the device will be unresponsive for 20ms while restoring values. data length in bytes: 0 data format: n/a type: write only default value: n/a units: n/a vout_mode (20h) definition: reports the v out mode and provides the exponent used in calculating several v out settings. data length in bytes: 1 data format: bit field type : read only protectable: n/a default value: 13h (linear mode, exponent is -13d) units: n/a command vout_mode (20h) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00010011 bit field name value description 7:0 mode 13h five bit two?s complement exponent for the mantissa delivered as the data bytes for an output voltage related command.
zl8801 33 fn8614.3 march 27, 2015 submit document feedback vout_command (21h) definition: this command sets or reports the target output voltage. the inte ger value is multiplied by 2 raised to the power of -13h. this command cannot be set to be higher than vout_max. data length in bytes: 2 data format: linear -16 unsigned type: r/w protectable: yes default value: pin-strap setting units: volts equation: vout = vout_command 2 -13 range : 0 to vout_max example : vout_command = 699ah = 27,034 target voltage equals 27034 2 -13 = 3.3v vout_cal_offset (23h) definition: the vout_cal_offset command is used to apply a fixed offs et voltage to the output voltage command value. this command is typically used by the user to calibrate a device in the application circuit. the tw o bytes are formatted as a two?s complement binary mantissa, used in co njunction with the exponent of -13h. data length in bytes: 2 data format: linear -16 signed type: r/w protectable: yes default value: 0000h units: v equation: v out cal offset = vout_cal_offset 2 -13 range : 3.99v vout_max (24h) definition: the vout_ max command sets an upper limit on the output voltage the unit can command regardless of any other commands or combinations. the intent of this command is to prov ide a safeguard against a user a ccidentally setting the output voltage to a possibly destructive level rather than to be the prim ary output overprotection. if a vout_command is sent with a v alue higher than vout_max, the device will set the output voltage to vout_max. data length in bytes: 2 data format: linear -16 unsigned type: r/w protectable: yes default value: 1.10 vout_command pin-strap setting units: v equation: vout max = vout_max 2 -13 range : 0v to 5.5v command vout_command (21h) format linear, unsigned binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value pin-strap setting command vout_cal_offset (23h) format linear-16 signed bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value0000000000000000 command vout_max (24h) format linear, unsigned binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value 1.10 x vout_command pin-strap setting
zl8801 34 fn8614.3 march 27, 2015 submit document feedback vout_margin_high (25h) definition: sets the value of the v out during a margin high. this vout_margin_high command loads the unit with the voltage to which the output is to be changed when the operation command is set to ?margin high?. data length in bytes: 2 data format: linear -16 unsigned. type: r/w word protectable: yes default value: 1.05 x vout_command pin-strap setting units: v equation: vout margin high = vout_margin_high x 2 -13 range : 0v to vout_max vout_margin_low (26h) definition: sets the value of the v out during a margin low. this vout_margin_low co mmand loads the unit with the voltage to which the output is to be changed when the op eration command is set to ?margin low?. data length in bytes: 2 data format: linear -16 unsigned type: r/w protectable: yes default value: 0.95 x vout_command pin-strap setting units: v equation: vout margin low = vout_margin_low range : 0v to vout_max command vout_margin_high (25h) format linear-16 unsigned bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value 1.05 x vout_c ommand pin-strap setting command vout_margin_low (26h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value 0.95 x vout_c ommand pin-strap setting
zl8801 35 fn8614.3 march 27, 2015 submit document feedback vout_transition_rate (27h) definition: this command sets the rate at which the output should change voltage when the device receives an operation command (margin high, margin low) that causes the output voltage to ch ange. the maximum possible positive value of the two data bytes indicates that the device should make the transition as quickly as possible. this co mmanded rate does not apply when the device is commanded to turn on or to turn off. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: ba00h (1.0v/ms) units: v/ms equation: vout_transition_rate = y x 2n range : 0.1 to 4v/ms vout_droop (28h) definition: the vout_droop sets the effective load line (v/i slope) for the ra il in which the device is used. it is the rate, in mv/a at which the output voltage decreases with incr easing output current for us e with adaptive voltage positioning requirements and pa ssive current sharing schemes. for devi ces that are set to sink output current (negat ive output current), the output voltage continue s to increase as the output current is negative. vout_droop is not needed with a sing le (2-phase) zl8801. vout_droop is needed when multiple zl8801s are operated in current sharing mode, i.e. 4-, 6- and 8-phase configurations. in this case, vout_droop is calc ulated based on the combined output current of all 4, 6 or 8 phases as applicable. data length in bytes: 2 data format: linear-11 type: r/w protectable: yes default value: 0000h (0mv/a) units: mv/a equation: vout_droop = y x 2n range : 0 to 40mv/a command vout_transition_rate (27h) format linear data format bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1011101000000000 command vout_droop (28h) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 0000000000000000
zl8801 36 fn8614.3 march 27, 2015 submit document feedback frequency_switch (33h) definition: sets the switching frequency of the device . initial default value is defined by a pin-strap and this value can be overridden by writing this command. if an external sync is utilized, this value should be set as close as possible to the external clock valu e. the output must be disabled when writing this comman d. available frequencies are defined by equation f sw = 16mhz/n where 12 n 80. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: pin-strap setting units: khz equation: frequency_switch = y x 2n range : 200khz to 1.33mhz interleave (37h) definition: configures the phase offset of a device that is sharing a comm on sync clock with other devices. a desired phase position is specified. interleave is used for setting the phase offset between individual devices, current sharing groups and/or combinatio ns of devices and current sharing groups. for devices within a single current sharing group the phase offset is set automatically. th e zl8801 uses dual edge modulation. phase offset should meas ured with respect to the center of pwm4 pulses. data length in bytes: 2 data format: bit field type : r/w protectable: yes default value: set by pin-strapped pmbus address units: n/a command frequency_switch (33h) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value pin-strap setting command interleave (37h) format bit field bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 000000000000four lsb?s of pmbus address bits purpose value description 15:4 not used 0 not used 3:0 position in group 0 to 15 sets position of the device?s rail within the group. a value of 0 is interpreted as 16. position 1 will have a 22.5 offset.
zl8801 37 fn8614.3 march 27, 2015 submit document feedback vout_ov_fault_limit (40h) definition: sets the v out overvoltage fault threshold. data length in bytes: 2 data format: linear-16 unsigned type : r/w protectable: yes default value: 1.15 x vout_command pin-strap setting units: v equation: vout ov fault limit = vout_ov_fault_limit x 2 -13 range : 0v to 7.99v vout_ov_fault_response (41h) definition: configures the v out overvoltage fault response. data length in bytes: 1 data format: bit field type : r/w protectable: yes default value: 80h (shut down immediately, no retries) units: retry time unit = 70ms command vout_ov_fault_limit (40h) format linear-16 unsigned bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value 1.15 x vout_command pin-strap setting command vout_ov_fault_response (41h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 10000000 bit field name value description 7:6 response behavior: the device: ?pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00-01 not used 10 disable and retry according to the setting in bits [5:3]. 11 not used 5:3 retry setting 000 no retry. the output remains disa bled until the device is restarted. 001-110 not used 111 attempts to restart continuously, without limitation, until it is commanded off (by the control pin or operation command or both), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 111 not used. retry time is fixed at 70ms.
zl8801 38 fn8614.3 march 27, 2015 submit document feedback vout_uv_fault_limit (44h) definition: sets the v out undervoltage fault threshold. this fault is masked du ring ramp, before power-good is asserted or when the device is disabled. data length in bytes: 2 data format: linear-16 unsigned type : r/w protectable: yes default value: 0.85 x vout_command pin-strap setting units: v equation: vout uv fault limit = vout_uv_fault_limit x 2 -13 range : 0v to 7.99v vout_uv_fault_response (45h) definition: configures the v out undervoltage fault response. note that vout uv fa ults can only occur after power-good (pg) has been asserted. under some circumstances this wi ll cause the output to stay fixed below the power-good threshold indefinitely. data length in bytes: 1 data format: bit field type : r/w protectable: yes default value: 80h (shut down immediately, no retry) units: retry time = 70ms command vout_uv_fault_limit (44h) format linear-16 unsigned bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value 0.85 x vout_command command vout_uv_fault_response (45h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 10000000 bit field name value description 7:6 response behavior: the device: ?pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00-01 not used 10 disable and retry according to the setting in bits [5:3]. 11 not used 5:3 retry setting 000 no retry. the output remains di sabled until the fault is cleared. 001-110 not used 111 attempts to restart continuously, without limita tion, until it is commanded off (by the enable pin or operation command or both), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 111 not used. retry time is fixed at 70ms.
zl8801 39 fn8614.3 march 27, 2015 submit document feedback iout_oc_fault_limit (46h) definition: sets the i out peak overcurrent fault threshold for each inductor (phase 0 and phase 1). either phase can trigger an overcurrent fault. this limit is applied to current me asurement samples taken after the current se nse blanking time has expired. a fault oc curs after this limit is exceeded for the number of consecutive switching periods as defined in isense_config. this feature shares the oc fault bit operation (in status_iout) and oc fault response with iout_avg_oc_fault_limit. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: dbc0h (30a) units: a equation: iout_oc_fault_limit = y x 2 n range : -100 to 100a iout_uc_fault_limit (4bh) definition: sets the i out valley undercurrent fault threshold for each inductor (phase 0 and phase 1). either phase can trigger an undercurrent fault. this limit is applied to current measurement samples taken after the current sense blanking time has expire d. a fault occurs after this limit is exceeded for the number of consecutiv e switching periods as defined in isense_config. this feature s hares the uc fault bit operation (in status_iout) and uc fault response with iout_avg_uc_fault_limit. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: d440h (-15a) units: a equation: iout_uc_fault_limit = y x 2 n range : -100 to 100a command iout_oc_fault_limit (46h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1101101111000000 command iout_uc_fault_limit (4bh) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1101010001000000
zl8801 40 fn8614.3 march 27, 2015 submit document feedback ot_fault_limit (4fh) definition: the ot_fault_limit command sets the temperature at which the de vice should indicate an over-temperature fault. when using xtemp (0, 1), either temperature sensor can trigger a fault. in response to the ot_fault_limit being exceeded, the device: sets the temperature bit in status_word, sets the ot_warning bit in status_temperature and the fault_int, fault_xtemp0 or fault_xtemp1 as applicable and notifies the host. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: ebe8h (+125 ? c) units: celsius equation: ot_fault_limit = y x 2 n range : 0c to +175c ot_fault_response (50h) definition: the ot_fault_response command instructs the device on what ac tion to take in response to an over-temperature fault. the setting ?10? in bits 7:6 should not be used with setting ?111? in bits 5:3 since this could result in a thermal runaway con dition. data length in bytes: 1 data format: bit field type : r/w protectable: yes default value: 80h (shut down immediately, no retry) units: retry time = 210ms command ot_fault_limit (4fh) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1110101111101000 command ot_fault_response (50h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 10000000 bit field name value description 7:6 response behavior: the device: ?pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00-01 not used 10 disable and retry according to the setting in bits [5:3]. 11 not used 5:3 retry setting 000 no retry. the output remains di sabled until the fault is cleared. 001-110 not used 111 attempts to restart continuously, without limitation, until it is commanded off (by the control pin or operation command), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 111 not used. retry delay is 210ms.
zl8801 41 fn8614.3 march 27, 2015 submit document feedback ot_warn_limit (51h) definition: the ot_warn_limit command sets the temperature at which the device should indicate an over-temperature warning alarm. when using xtemp (0,1), either temperature sensor can trigger a warning. in response to the ot_warn_limit being exceeded , the device: sets the temperature bit in status_word, sets th e ot_warning bit in status_tem perature and the fault_int, fault_xtemp0 or fault_xtemp1 as applicable and notifies the host. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: eb70h (+110c) units: celsius equation: ot_warn_limit = y x 2 n range : 0c to +175c ut_warn_limit (52h) definition: the ut_warn_limit command set the temperature at which th e device should indicate an under-temperature warning alarm. when using xtemp (0,1), either temperature sensor can tr igger a warning. in response to the ut_warn_limit being exceeded , the device: sets the temperature bit in status_word, sets the ut_warning bit in status_temperature and the fault_int, fault_xtemp0 or fault_xtemp1 as applicable and notifies the host. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: dc40h (-30c) units: celsius equation: ut_warn_limit = y x 2 n range : -55c to +25c command ot_warn_limit (51h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1110101101110000 command ut_warn_limit (52h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1101110001000000
zl8801 42 fn8614.3 march 27, 2015 submit document feedback ut_fault_limit (53h) definition: the ut_fault_limit command sets the temperature, in degree s celsius, of the unit at wh ich it should indicate an under-temperature fault. when using xtemp (0,1), either temperature sensor can trigger a fault. in response to the ut_fault_lim it being exceeded, the device: sets the temperature bit in status _word, sets the ut_fault bit in status_temperature and the fault_int, fault_xtemp0 or fault_xtemp1 as applicable and notifies the host. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: e530h (-45c) units: celsius equation: ut_fault_limit = y x 2 n range : -55c to +25c ut_fault_response (54h) definition: configures the under-temperature fault response as defined by the following table. the dela y time is the time between restart attempts. data length in bytes: 1 data format: bit field type : r/w protectable: yes default value: 80h (shut down immediately, no retry) units: retry time unit = 210ms command ut_fault_limit (53h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1110010100110000 command ut_fault_response (54h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 10000000 bit field name value description 7:6 response behavior: the device: ?pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00-01 not used 10 disable and retry according to the setting in bits [5:3]. 11 not used 5:3 retry setting 000 no retry. the output remains disa bled until the device is restarted. 001-110 not used 111 attempts to restart continuously, without limitation, until it is commanded off (by the control pin or operation command), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 111 not used. retry time is fixed at 210ms.
zl8801 43 fn8614.3 march 27, 2015 submit document feedback vin_ov_fault_limit (55h) definition: sets the v in overvoltage fault threshold. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: d380h (14v) units: v equation: vin_ov_fault_limit = y x 2 n range : 0 to 19v vin_ov_fault_response (56h) definition: configures the v in overvoltage fault response as defi ned by the following table. the dela y time is the time between restart attempts. data length in bytes: 1 data format: bit field. type : r/w protectable: yes default value: 80h (immediate shutdown, no retry) units: retry time unit = 70ms command vin_ov_fault_limit (55h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1101001110000000 command vin_ov_fault_response (56h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 10000000 bit field name value description 7:6 response behavior: the device: ?pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00-01 not used 10 disable and retry according to the setting in bits[5:3]. 11 not used 5:3 retry setting 000 no retry. the output remains di sabled until the fault is cleared. 001-110 not used 111 attempts to restart continuously, without limitation, until it is commanded off (by the control pin or operation command), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 111 not used. retry time is fixed at 70ms.
zl8801 44 fn8614.3 march 27, 2015 submit document feedback vin_ov_warn_limit (57h) definition: sets the v in overvoltage warning threshold as defined by the foll owing table. in response to the ov_warn_limit being exceeded, the device: sets the none of the above and input bits in status_word, sets the vin_ov_warning bit in status_input and notifies the host. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: d360h (13.5v) units: v equation: vin_ov_fault_limit = y x 2 n range : 0 to 19v vin_uv_warn_limit (58h) definition: sets the v in undervoltage warning threshold. in response to the uv_warn_limit being exceeded, the device: sets the none of the above and input bits in status_word, sets the vi n_uv_warning bit in status_input and notifies the host. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: 1.10 x vin_uv_fault_limit pin-strap setting units: v equation: vin_uv_warn_limit = y x 2 n range : 0 to 19v command vin_ov_warn_limit (57h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1101001101100000 command vin_uv_warn_limit (58h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1.10 x vin_uv_fault_limit pin-strap setting
zl8801 45 fn8614.3 march 27, 2015 submit document feedback vin_uv_fault_limit (59h) definition: sets the v in undervoltage fault threshold. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: pin-strap setting units: v equation: vin_uv_fault_limit = y x 2 n range : 0 to 19v vin_uv_fault_response (5ah) definition: configures the v in undervoltage fault response as defined by the follow ing table. the delay time is the time between restart attempts. data length in bytes: 1 data format: bit field type : r/w protectable: yes default value: 80h (immediate shut down, no retry) units: retry time unit = 70ms command vin_uv_fault_limit (59h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value pin-strapped value command vin_uv_fault_response (5ah) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 10000000 bit field name value description 7:6 response behavior: the device: ?pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00-01 not used 10 disable and retry according to the setting in bits [5:3]. 11 not used 5:3 retry setting 000 no retry. the output remains di sabled until the fault is cleared. 001-110 not used 111 attempts to restart continuously, without limitation, until it is commanded off (by the control pin or operation command), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 111 not used. retry time is fixed at 70ms.
zl8801 46 fn8614.3 march 27, 2015 submit document feedback power_good_on (5eh) definition: sets the voltage threshold for power-good indication. power-good asserts when the output voltage exceeds power_good_on and deasserts wh en the output voltage is less than vout_uv_fault_limit. data length in bytes: 2 data format: linear-16 unsigned type : r/w protectable: yes default value: 0.9 x vout_command pin-strap setting units: v ton_delay (60h) definition: sets the delay time from when the device is enabled to the start of v out rise. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: ca80h, 5ms units: ms equation: ton_delay = y x 2 n range : 0 to 5 seconds ton_rise (61h) definition: sets the rise time of v out after enable and ton_delay for 2-phase (single device ) operation. to adjust th e rise time in 4-, 6- or 8-phase operation, use multi_phase_ramp_gain (70h). data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: ca80h, 5ms units: ms equation: ton_rise = y x 2 n range : 5 to 100ms. short rise times may cause excessive input and ou tput currents to flow, thus triggering overcurrent faults at start-up. command power_good_on (5eh) format linear, unsigned binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value 0.9 x vout_command pin-strap setting command ton_delay (60h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1100101010000000 command ton_rise (61h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1100101010000000
zl8801 47 fn8614.3 march 27, 2015 submit document feedback toff_delay (64h) definition: sets the delay time from disable to start of v out fall. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: ca80h, 5ms units: ms equation: ton_delay = y x 2 n range : 0 to 5 seconds toff_fall (65h) definition: sets the fall time for v out after disable and toff_delay. this setting is only valid in 2-phase operation. setting the toff_fall to values less than 5ms will cause the zl8801 to turn off both the high and low-side fets (or disable the drmos devic e) immediately after the expiration of the toff_delay time. in 4-, 6- or 8-phase operation, the zl8801 will always turn off both t he high and low-side fets (or disable the drmos device) immediately after the expiration of the toff_delay time. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: ca80h, 5ms units: ms equation: toff_fall = y x 2 n range : 5 to 100ms. short fall times may cause excessive negative outp ut current to flow, thus trigge ring undercurrent faults at shutdown. command toff_delay (64h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1100101010000000 command toff_fall (65h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1100101010000000
zl8801 48 fn8614.3 march 27, 2015 submit document feedback status_byte (78h) definition: the status_byte command returns the low byte of information from the status_word. based on the information in this byte, the host can get more information by reading the appropriate status registers. data length in bytes: 1 data format: bit field type : read only protectable: no default value: 0000h units: n/a command status_byte (78h) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00000000 bit number status bit name meaning 7 busy a fault was declared because the device was busy and unable to respond. 6 off this bit is asserted if the unit is not providing power to the output, regardless of the reason, including simply not being enabled. 5 vout_ov_fault an output overvoltage fault has occurred. 4 iout_oc_fault an output overcurrent fault has occurred. 3 vin_uv_fault an input undervoltage fault has occurred. 2 temperature a temperature fault or warning has occurred. 1 cml a communications, memory or logic fault has occurred. 0 not used not used
zl8801 49 fn8614.3 march 27, 2015 submit document feedback status_word (79h) definition: the status_word command returns two bytes of information with a summary of the unit?s fault condition. based on the information in these bytes, the host can get more information by reading the appropriate status registers. the low byte of the status_word is the same register as the status_byte (78h) command. data length in bytes: 2 data format: bit field type : read only protectable: no default value: 0000h units: n/a command status_word (79h) format bit field bit position 1514131211109876543210 access rrrrrrrrrrrrrrrr function see following table default value 0000000000000000 bit number status bit name meaning 15 vout an output voltage fault or warning has occurred. 14 iout an output current or output power fault or warning has occurred. 13 input an input voltage, input current, or input power fault or warning has occurred. 12 mfg_specific a manufacturer specific fault or warning has occurred. 11 power_good # the power_good signal, if present, is negated. ( note 15 ). 10 not used not used 9 other a bit in status_vout, status_iout, status_input, status_temperature, status_cml or status_mfr_specific is set. 8 not used not used 7 busy a fault was declared because the device was busy and unable to respond. 6 off this bit is asserted if the unit is not providing power to the output, regardless of the reason, including simply not being enabled. 5 vout_ov_fault an output overvoltage fault has occurred. 4 iout_oc_fault an output overcurrent fault has occurred. 3 vin_uv_fault an input undervoltage fault has occurred. 2 temperature a temperature fault or warning has occurred. 1 cml a communications, memory or logic fault has occurred. 0 not used not used note: 15. if the power_good# bit is set, this indi cates that the power_good signal, if presen t, is signaling that the output power is not good.
zl8801 50 fn8614.3 march 27, 2015 submit document feedback status_vout (7ah) definition: the status_vout command returns one data byte with the status of the output voltage. data length in bytes: 1 data format: bit field type : read only protectable: no default value: 00h units: n/a status_iout (7bh) definition: the status_iout command returns one data byte with the status of the output current. data length in bytes: 1 data format: bit field type : read only protectable: no default value: 00h units: n/a command status_vout (7ah) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00000000 bit number status bit name meaning 7 vout_ov_fault indicates an output overvoltage fault. 6 vout_ov_warning these bits are not used. 5 vout_uv_warning indicates an output undervoltage. 4 vout_uv_fault indicates an output undervoltage fault. 3:0 n/a these bits are not used. command status_iout (7bh) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00000000 bit number status bit name meaning 7 iout_oc_fault an output overcurrent fault has occurred. 6 iout_oc_lv_fault an output overcurrent and low voltage fault has occurred. 5 iout_oc_warning an output overcurrent warning has occurred. 4 iout_uc_fault an output undercurrent fault has occurred. 3 phase 0 fault a fault occurred on phase 0. 2 phase 1 fault a fault occurred on phase 1. 0:1 not used these bits are not used.
zl8801 51 fn8614.3 march 27, 2015 submit document feedback status_input (7ch) definition: the status_input command returns input volt age and input current status information. data length in bytes: 1 data format: bit field type : read only protectable: no default value: 00h units: n/a status_temperature (7dh) definition: the status_temperature command returns one byte of inform ation with a summary of any te mperature related faults or warnings. data length in bytes: 1 data format: bit field type : read only protectable: no default value: 00h units: n/a command status_input (7ch) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00000000 bit number status bit name meaning 7 vin_ov_fault an input overvoltage fault has occurred. 6 vin_ov_warning an input overvoltage warning has occurred. 5 vin_uv_warning an input undervoltage warning has occurred. 4 vin_uv_fault an input undervoltage fault has occurred. 3:0 not used not used command status_temperature (7dh) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00000000 bit number status bit name meaning 7 ot_fault an over-temperature fault has occurred. 6 ot_warning an over-temperature warning has occurred. 5 ut_warning an under-temperature warning has occurred. 4 ut_fault an under-temperature fault has occurred. 3 fault_int a warning or fault occurred from the internal temperature sensor. 2 fault_xtemp0 a warning or fault occurred from the external temperature sensor 0. 1 fault_xtemp1 a warning or fault occurred from the external temperature sensor 1. 0 not used not used
zl8801 52 fn8614.3 march 27, 2015 submit document feedback status_cml (7eh) definition: the status_word command returns one byte of information wi th a summary of any communications, logic and/or memory errors. data length in bytes: 1 data format: bit field type : read only protectable: no default value: 00h units: n/a status_mfr_specific (80h) definition: the status_mfr_specific command returns one byte of in formation providing the status of the device?s voltage monitoring and clock synchronization faults. note: the vmon ov /uv warnings are set at 10% of the vmon_xx_fault commands. data length in bytes: 1 data format: bit field type: read only protectable: no default value: 00h units: n/a command status_cml (7eh) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00000000 bit number meaning 7 invalid or unsupported pmbus? command was received. 6 the pmbus? command was sent with invalid or unsupported data. 5 a packet error was detected in the pmbus? command. 4:2 not used 1 a pmbus? command tried to write to a read only or protected command, or a communication fault other than the ones listed in this table has occurred. 0not used command status_mfr_specific (80h) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00000000 bit field name meaning 7not usednot used 6 phase a phase or phases of a multi-phas e current sharing group did not initialize. 5 vmon uv warning the voltage on the vmon pin has dropped 10% below the level set by mfr_vmon_uv_fault. 4 vmon ov warning the voltage on the vmon pin has risen 10% above the level set by mfr_vmon_ov_fault. 3 external switching period fault loss of external clock synchronization has occurred. 2not usednot used 1 vmon uv fault the voltage on the vmon pin has dropped below the level set by mfr_vmon_uv_fault. 0 vmon ov fault the voltage on the vmon pin has risen above the level set by mfr_vmon_ov_fault.
zl8801 53 fn8614.3 march 27, 2015 submit document feedback read_vin (88h) definition: returns the input voltage reading. data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: v equation: read_vin = y x 2 n range : n/a read_iin (89h) definition: returns the input current reading. data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: a equation: read_iin = y x 2 n range : n/a read_vout (8bh) definition: returns the output voltage reading. data length in bytes: 2 data format: linear-16 unsigned. type: read only protectable: no default value: n/a equation: read_vout = read_vout x 2 -13 units: v command read_vin (88h) format linear-11 bit position 1514131211109876543210 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a command read_iin (89h) format linear-11 bit position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a command read_vout (8bh) format linear-16 unsigned bit position 1514131211109876543210 access rrrrrrrrrrrrrrrr default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a
zl8801 54 fn8614.3 march 27, 2015 submit document feedback read_iout (8ch) definition: returns the combined output current of phase 0 and phase 1, i.e., the total output current. data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: a equation: read_iout = y x 2 n range : n/a read_temperature_1 (8dh) definition: returns the temperature reading internal to the device. data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: c equation: read_temperature_1 = y x 2 n range : n/a read_temperature_2 (8eh) definition: returns the temperature reading from the external temperature device connected to xtemp0. data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: c equation: read_temperature_2 = y x 2 n range : n/a command read_iout (8ch) format linear-11 bit position 1514131211109876543210 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a command read_internal_temp_1 (8dh) format linear-11 bit position 1514131211109876543210 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a command read_external_temp_2 (8eh) format linear-11 bit position 1514131211109876543210 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a
zl8801 55 fn8614.3 march 27, 2015 submit document feedback read_temperature_3 (8fh) definition: returns the temperature reading from the external temperature device connected to xtemp1. data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: c equation: read_temperature_2 = y x 2 n range : n/a read_duty_cycle (94h) definition : reports the duty cycle of the converter during the enable stat e. the duty cycle read is essentially an average of the duty cycles of phase 0 and phase 1. data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: % equation: read_duty_cycle = y x 2 n range : 0 to 100% read_frequency (95h) definition : reports the actual switching frequency of the converter during the enable state. data length in bytes: 2 data format: linear-11 type: read only default value: n/a units: khz equation: read_frequency = y x 2 n range : n/a units: n/a command read_external_temp_3 (8fh) format linear-11 bit position 1514131211109876543210 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a command read_duty_cycle (94h) format linear-11 bit position1514131211109876543210 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a command read_frequency (95h) format linear-11 bit position 1514131211109876543210 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a
zl8801 56 fn8614.3 march 27, 2015 submit document feedback pmbus_revision (98h) definition: the pmbus_revision command returns the revision of the pmbus specification to which the device is compliant. data length in bytes: 1 data format: bit field type: read only protectable : n/a default value: 11h (part 1 revision 1.2, part 2 revision 1.2) units: n/a mfr_id (99h) definition: mfr_id sets a user defined identification string not to exceed 32 bytes. the sum to tal of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_se rial and user_data_00 plus one byte pe r command cannot exceed 128 bytes. this limitation includes multiple writes of this command before a store command. to clear multiple writes, perform a restore, write this command then perform a store/restore. data length in bytes: user defined data format: ascii. iso/iec 8859-1 type: block r/w protectable: yes default value: null units: n/a mfr_model (9ah) definition: mfr_model sets a user defined model string not to exceed 32 bytes. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial and user_data_00 plus one byte per command cannot exceed 128 bytes. this limitation includes multiple writes of this command before a store command. to clear multiple writes, perform a restore, w rite this command then pe rform a store/restore. data length in bytes: user defined data format: ascii. iso/iec 8859-1 type: block r/w protectable: yes default value: null units: n/a command pmbus_revision (98h) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00100010 bits 7:4 part 1 revision bits 3:0 part 2 revision 0000 1.0 0000 1.0 0001 1.1 0001 1.1 0010 1.2 0010 1.2
zl8801 57 fn8614.3 march 27, 2015 submit document feedback mfr_revision (9bh) definition: mfr_revision sets a user defined revisi on string not to exceed 32 bytes. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_se rial and user_data_00 plus one byte per command cannot exceed 128 bytes. this limitation includes multiple writes of this command before a store command. to clear multiple writes, pe rform a restore, write this command then perform a store/restore. data length in bytes: user defined data format: ascii. iso/iec 8859-1 type: block r/w protectable: yes default value: null units: n/a mfr_location (9ch) definition: mfr_location sets a user defined location identifier string not to exceed 32 bytes. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mf r_date, mfr_serial and user_data_00 plus one byte per command cannot exceed 128 bytes. this limitation includes multip le writes of this command before a store command. to clear multiple writes, perform a restore, write this command then perform a store/restore. data length in bytes: user defined data format: ascii. iso/iec 8859-1 type: block r/w protectable: yes default value: null units: n/a mfr_date (9dh) definition: mfr_date sets a user defined date string not to exceed 32 bytes. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial and user_data_00 plus one byte per command cannot exceed 128 bytes. this limitation includes multiple writes of this command before a store command. to clear multiple writes, perform a restore, w rite this command then pe rform a store/restore. data length in bytes: user defined data format: ascii. iso/iec 8859-1 type: block r/w protectable: yes default value: null units: n/a mfr_serial (9eh) definition: mfr_serial sets a user defined serialized identifier string no t to exceed 32 bytes. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_se rial and user_data_00 plus one byte per command cannot exceed 128 bytes. this limitation includes multiple writes of this command before a store command. to clear multiple writes, pe rform a restore, write this command then perform a store/restore. data length in bytes: user defined data format: ascii. iso/iec 8859-1 type: block r/w protectable: yes default value: null units: n/a
zl8801 58 fn8614.3 march 27, 2015 submit document feedback read_iout0 (a1h) definition: returns the output current of phase 0. data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: a equation: read_iout = y x 2 n range : n/a read_iout1 (a2h) definition: returns the output current of phase 1. data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: a equation: read_iout = y x 2 n range : n/a command read_iout0 (a1h) format linear-11 bit position 1514131211109876543210 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a command read_iout1 (a2h) format linear-11 bit position 1514131211109876543210 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a
zl8801 59 fn8614.3 march 27, 2015 submit document feedback legacy_fault_group (a8h) definition: this command allows the zl880 1 to sequence and fault spread with devi ces other than the zl8800 and zl8801. this command sets which rail ddc ids should be listened to for fault spreading information. the data sent is a 4-byte, 32-bit vector where every bit represents a rail?s ddc id. a bit set to 1 indicates a device ddc id to which the configured device will respond upon receiving a fault spreading event. in this vector, bit 0 of byte 0 correspon ds to the rail with ddc id 0. following through, bit 7 of byt e 3 corresponds to the rail with ddc id 31. note: the device/rail?s own ddc id shou ld not be set within the legacy_fault_group command for that device/rail. all devices in a current share rail (devices other than the zl 8800/1) must shut down for the rail to report a shut down. if fault spread mode is enabled in user_config, the device will immediately shut down if one of its ddc_group members fail. the device/rail will attempt its configured restart only after all devices/rails within the ddc_group have cleared their faults. if fault spread mode is disabled in user_config, the device will perform a sequenced shutdown as defined by the sequence command setting. the rails/devices in a sequencing set only atte mpt their configured restart afte r all faults have cleared with in the ddc_group. if fault spread mode is disabled and sequencing is al so disabled, the device will ignore faults from other devices a nd stay enabled. data length in bytes: 4 data format: bit field type: block r/w protectable: yes default value: 00000000h units: n/a ic_device_id (adh) definition: reports device identification information. data length in bytes: 4 data format: cus type: block read protectable: no default value: 49a02300h units: n/a command legacy_fault_group (a8h) format bit field bit position 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value0000000000000000 format bit field bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value0000000000000000 bit field name value setting description 31:0 fault group na 00000000h identifies the devices in the fault spreading group. command ic_device_id (adh) format block read byte position 3210 function mfr code id high byte id low byte reserved default value 49h a0h 23h 00h
zl8801 60 fn8614.3 march 27, 2015 submit document feedback ic_device_rev (aeh) definition: reports device revision information. data length in bytes: 4 data format: cus type: block read protectable: no default value: 01000000h units: n/a user_data_00 (b0h) definition: user_data_00 sets a user defined data string not to exceed 32 bytes. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_ serial and user_data_00 plus one byte per command cannot exceed 128 bytes this limitation includes multiple writes of this command before a store command. to clear multiple writes, perform a restore, w rite this command then pe rform a store/restore. data length in bytes: user defined data format: ascii. iso/iec 8859-1 type: block r/w protectable: yes default value: null units: n/a deadtime_max (bfh) definition: sets the maximum dead time value for the adaptive dead time algorithm. settings ar e applied to both phases. data length in bytes: 2 data format: bit field type: r/w protectable: yes default value: 3838h (56ns/56ns) units: ns range : 0 to 60ns reference: n/a command ic_device_rev (aeh) format block read byte position 3210 function firmware major firmware minor factory config reserved default value 01h 00h 00h 00h command deadtime_max (bfh) format bit field/linear-7 unsigned bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 0011100000111000 bits purpose value description 15 not used 0 not used 14:8 sets the maximum h-to-l dead time h limits the maximum allowed h-to-l dead time when using the adaptive dead time algorithm. dead time = hns (signed). 7 not used 0 not used 6:0 sets the maximum l-to-h dead time l limits the maximum allowed l-to-h dead time when using the adaptive dead time algorithm. dead time = lns (signed).
zl8801 61 fn8614.3 march 27, 2015 submit document feedback iout0_cal_gain (cah) definition: sets the effective impedance across the phase 0 current sense circuit for use in calculating output current at +25c. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: aa66h (0.3m ) units: m equation: iout_cal_gain = y x 2 n iout1_cal_gain (cbh) definition: sets the effective impedance across the phase 1 current sense circuit for use in calculating output current at +25c. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: aa66h (0.3m ) units: m equation: iout_cal_gain = y x 2n iout0_cal_offset (cch) definition: used to null out any offsets in the output current sensing ci rcuit and to compensate for delayed measurements of current ramp due to isense blanking time for phase 0. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: 0000h (0a) units: a equation: iout_cal_offset = y x 2 n command iout0_cal_gain (cah) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1010101001100110 command iout1_cal_gain (cbh) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1010101001100110 command iout0_cal_offset (cch) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 0000000000000000
zl8801 62 fn8614.3 march 27, 2015 submit document feedback iout1_cal_offset (cdh) definition: used to null out any offsets in the output current sensing ci rcuit and to compensate for delayed measurements of current ramp due to isense blanking time for phase 1. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: 0000h (0a) units: a equation: iout_cal_offset = y x 2 n min_vout_reg (ceh) definition: sets the minimum output voltage in millivol ts (mv) that the device will attempt to regulate to during start-up and shutdown ramps. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: f258h (150mv) units: a equation: min_vout_reg = y x 2 n isense_config (d0h) definition: configures current sense circuitry. settings are applied to both phases. data length in bytes: 2 data format: bit field type: r/w word protectable: yes default value: 4204h (256ns, 5 counts, downslope, low range) units: n/a range : n/a command iout1_cal_offset (cdh) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 0000000000000000 command min_vout_reg (ceh) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1111001001011000 command isense_config (d0h) format bit field bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 0100001000000100
zl8801 63 fn8614.3 march 27, 2015 submit document feedback bit field name value setting description 15:11 current sense blanking time 00000 0 sets the blanking time current sense blanking time in increments of 32ns 00001 32 00010 64 00011 96 00100 128 00101 160 00110 192 00111 224 01000 256 01001 288 01010 320 01011 352 01100 384 01101 416 01110 448 01111 480 10000 512 10001 544 10010 576 10011 608 10100 640 10101 672 10110 704 10111 736 11000 768 11001 800 11010 832 10:8 current sense fault count 000 1 sets the number of consecutive overcurre nt (oc) or undercurrent (uc) events required for a fault. an event can occur once during each switching cycle. for example, if 5 is selected, an oc or uc event must occur for 5 consecutive switching cycles, resulting in a dela y of at least 5 switching periods. 001 3 010 5 011 7 100 9 101 11 110 13 111 15 7:4 not used 000 not used not used 3:2 current sense control 00 not used selection of current sensing method (dcr based: v out referenced). 01 dcr (down slope) 10 dcr (up slope) 11 not used 1:0 current sense range 00 low range low range 25mv, medium range 35mv, high range 50mv 01 medium range 10 high range 11 not used
zl8801 64 fn8614.3 march 27, 2015 submit document feedback user_config (d1h) definition: configures several user-level features. data length in bytes: 2 data format: bit field type: r/w protectable: yes default value: 0402h units: n/a command user_config (d1h) format bit field bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 0000010000000010 bit field name value setting description 15:11 minimum duty cycle 00000 0-31d sets the minimum duty-cyc le to 2x (value+1)/512. must be enabled with bit 7. 10 enable dr mos 0 disable 0 = pwml and pwmh are direct drive to mosfet driver. 1 enable 1 = pwml is drmos enable, pwmh is drmos pwm input. 9:8 not used 00 not used not used 7 minimum duty cycle control 0 disable 1 = minimum duty cycle control is enable d, 0 = minimum duty cycle control is disabled. 1enable 6:5 not used 00 not used not used 4 margin ratio enable 0 disable use vout_margin_ratio to configure margin values when enabled. 1enable 3 not used 0 not used not used 2 power-good configuration 0 open drain 0 = pg is open-drain output. 1 push-pull 1 = pg is push-pull output. 1xtemp enable 0 disable enable external temperature sensor. 1enable 0xtemp fault select 0 disable selects external temperature sensor to determine temperature faults. 1enable
zl8801 65 fn8614.3 march 27, 2015 submit document feedback iin_cal_gain (d2h) definition: sets the effective impedance across the current sense circuit for use in calculating input current at +25c. data length in bytes: 2 data format: linear-11 type: r/w protectable: yes default value: c200h (2m ) units: m equation: iin_cal_gain = y x 2 n ddc_config (d3h) definition: configures ddc addressing and current sharing for up to 8 phas es. to operate as a 4-phase controller, set both devices to the same rail id, set phases in rail to 4, then set each phase id sequentially, for example, 0 and 1. the zl8801 will automatic ally equally offset all phases in the rail. note that phase spreadin g is done automatically as part of the ddc_config command, the interleave command only applie s to non-current sharing rails . following is a table illustrating how ddc_config automatically sets phases for multi-phase configurations. in 2- phase single device operation, the phases are set to position 0 and 4 automatically . data length in bytes: 2 data format: bit field type: r/w protectable: yes default value: pmbus? address pin-strap dependent units: n/a command iin_cal_gain (d2h) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value1100001000000000 4 phases 6 phases 8 phases id # phase phase 0 phase 1 id # phase phase 0 phase 1 id # phase phase 0 phase 1 device 1040406040804 device 2142616151815 device 3 26262826 device 4 3837 command ddc_config (d3h) format bit field bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 000 lower 5 bits of device address 00000000 bit field name value setting description 15:13 phase id 0 to 3 0 sets the device?s phase position within the rail (see chart above) 12:8 rail id 0 to 31d 0 identifies the device as part of a current sharing rail (shared output). 7:3 not used 00 00 not used 2:0 phases in rail 1, 3, 5, 7d 0 identifies the number of phases on the same rail (+1).
zl8801 66 fn8614.3 march 27, 2015 submit document feedback power_good_delay (d4h) definition: sets the delay applied between the output exceeding the pg threshold (power_good_on) an d asserting the pg pin. the delay time can range from 0ms up to 500s, in steps of 125ns. a 1ms minimum configured value is recommended to apply proper debounce to this signal. data length in bytes: 2 data format : linear-11 type: r/w protectable : yes default value: ca00h, 4ms units: ms equation: power_good_delay = y x 2 n range: 0 to 5 seconds multi_phase_ramp_gain (d5h) definition: multi_phase_ramp_gain command value indirectly determines the output voltage rise time during the turn-on ramp. typical gain values range from 1 to 5. lower gain values produce longer ramp times. multi_phase_ramp_gain mode is automatically selected when the zl8801 is configured to operate in a 4-, 6- or 8-phase current sharing group. when in multi_phase_ramp_gain mode the turn-on ra mp-up is done with the high ba ndwidth ascr control circuitry disabled, resulting in a lower loop bandwidth during start-up ra mps. once power_good has been a sserted, ascr circuitry is enabl ed and the zl8801 operates normally. when multi_phase_ramp_gain mo de is enabled, soft-off ramps are not allowed (toff_fall is ignored). when the zl8801 is commanded to shut down, both the high -side and low-side mosfets are tu rned off, or in the case of drmos, the enable pin is pulled low (drmos disabled). large load current transitions during multi-phase ramp ups will cause out put voltage discontinuities. when the phase count is 2; i.e., when the zl8801 is operating st andalone, ascr is enabled at a ll times and all commands associa ted with turn-on and turn-off (ton_rise, toff_fall, soft-off) operate normally. data length in bytes: 1 data format: 1 byte binary type : r/w protectable: yes default value: 03h units: n/a command power_good_delay (d4h) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1100101000000000 command multi_phase_ramp_gain (d5h) format 1 byte binary bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w default value 00000011 bit field name value description 7:0 ?gain 00-ff start-up ramp gain
zl8801 67 fn8614.3 march 27, 2015 submit document feedback inductor (d6h) definition: informs the device of the circuit?s inductor value. this is used in adaptive algorithm calculat ions relating to the inductor ripple current. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: b23dh (0.56h) units: h equation: inductor = y x 2 n range: 0 to 100h vout_margin ratio (d7h) definition: percentage to set margin_high and margin_low above and below vout_command when feature is enabled by user_config. data length in bytes: 2 data format: linear-11 type: r/w protectable: yes default value: 5 (ca80h) units: % equation: vout_margin_ratio = y x 2 n range : 0 to 50% command inductor (d6h) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1011001000111101 command vout_margin_ratio (d7h) format linear-11 bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value1100101010000000
zl8801 68 fn8614.3 march 27, 2015 submit document feedback ovuv_config (d8h) definition: configures the output voltage ov and uv fault detection feature data length in bytes : 1 data format: bit field type : r/w protectable : yes default value : 00h units: n/a xtemp_scale (d9h) definition: sets a scalar value that is used for calibrating both of the external temperature sensors (phase 0 and phase 1). the constant is applied in equation 27 to produce the read value of xtemp via the pmbus? command read_temperature_2 and read_temperature_3. data length in bytes: 2 data format: linear -11 type : r/w protectable: yes default value: ba00h (1.0) units: 1/c equation: range: 0.1 to 10 command ovuv_config (d8h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 00000000 bits purpose value description 7 controls how an ov fault response shutdown sets the output driver state 0 an ov fault does not enable low-side power device. 1 an ov fault enables the low-side power device. 6:4 not used 0 not used 3:0 defines the number of consecutive limit violations required to declare an ov or uv fault n n+1 consecutive ov or uv violations initiate a fault response. command xtemp_scale (d9h) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1011101000000000 et xtemp_offs e xtemp_scal 1 mperature externalte rature_2 read_tempe ? ? ? ? ? ? ? ? ? ? ?
zl8801 69 fn8614.3 march 27, 2015 submit document feedback xtemp_offset (dah) definition: sets an offset value that is used for calibrating both of the external temperature sensors (phase 0 and phase 1). the constant is applied in equation 28 to produce the read value of xtemp via the pmbus? command read_temperature_2 and read_temperature_3. data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: 0000h (0) units: c equation: range: -100c to +100c tempco_config (dch) definition: configures the correction factor and temperature measuremen t source when performing temperature coefficient correction for current sense. tempco_config values are applied as negative correction to a positive temper ature coefficient. when using external temperature sensors, the coeffici ent applies to both temperature sensors. data length in bytes: 1 data format: bit field type : r/w protectable: yes default value: 27h (3900ppm/c) equation: to determine the hex value of the tempco correction factor (tc) for current scale of a power stage current sensing, first determine the temperature coefficient of resistance for the sensing element, . this is found with equation 29 : where: r = sensing element resistance at temperature ?t? r ref = sensing element resistance at reference temperature t ref = temperature coefficient of resistance for the sensing element material t = temperature measured by temperature sensor, in degrees celsius t ref = reference temperature that is specified at for the sensing element material after is determined, convert the value in units of 100ppm/c. this value is then converted to a hex value by using equation 30 : typical values: copper = 3900ppm/ ? c (27h), silicon = 4800ppm/ ? c (30h) range : 0 to 6300ppm/ ? c command xtemp_offset (dah) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 0000000000000000 command tempco_config (dch) format bit field bit position 76543210 access r/wr/wr/wr/wr/wr/wr/wr/w function see following table default value 00100111 et xtemp_offs e xtemp_scal 1 mperature externalte rature_2 read_tempe ? ? ? ? ? ? ? ? ? ? ? () ref ref ref rr rt t ? ? ? ? 6 10 100 tc ? ? ?
zl8801 70 fn8614.3 march 27, 2015 submit document feedback deadtime (ddh) definition: sets the nonoverlap between pwm transitions using a 2 byte data field. the most significant byte controls the high-side to low-side deadtime value as a single 2?s-co mplement signed value in units of ns. the least-significant byte controls the low-sid e to high-side deadtime value. positive values imply a nonoverlap of the fet drive on-times. negative values imply an overlap of the fet drive on-times. writing a value to this command immediately befo re writing the deadtime_config command will set a new maximum for the adaptive deadtime algorithm. the device will operate at the deadtime values written to this command when adaptive deadt ime is disabled. data length in bytes: 2 data format: cus type: r/w protectable: yes default value: 1010h (16ns/16ns) units: ns range: -15ns to 60ns deadtime_config (deh) definition: configures the adaptive dead time optimization mode. also sets the minimum deadtime value for the adaptive deadtime mode range. data length in bytes: 2 data format: bit field type: r/w protectable: yes default value: 8888h (frozen deadtime contro l, 8ns/8ns minimum deadtime) units: n/a bits purpose value description 7 selects the temp sensor source for tempco correction 0 selects the internal temperature sensor. 1 selects the xtemp0 and xtemp1 pi ns for temperature measurements (2n3904 junction) note that xtemp must be enabled in user_config, bit1. 6:0 sets the tempco correction in units of 100ppm/c for iout_cal_gain tc rsen (dcr) = iout_cal_gain x (1+tc x (t-25)). where rsen = resistance of sense element. command deadtime (ddh) format linear-8 signed bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function high to low-side deadtime 8 bi t two's complement signed low to high-side deadtime 8 bit two's complement signed default value 0001000000010000 command deadtime_config (deh) format bit field/linear-7 unsigned bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 1000100010001000 bits purpose value description 15 sets the high-to-low tr ansition deadtime mode 0 adaptive h-to-l deadtime control. 1 freeze the h-to-l deadtime. 14:8 sets the minimum h-to-l deadtime 0-126d limits the minimum allowed h-to-l deadtime when using the adaptive deadtime algorithm (2ns resolution). 7 sets the low-to-high tr ansition deadtime mode 0 adaptive l-to-h deadtime control. 1 freeze the l-to-h deadtime. 6:0 sets the minimum l-to-h deadtime 0-126d limits the minimum allowed l-to-h deadtime when using the adaptive deadtime algorithm (2ns resolution).
zl8801 71 fn8614.3 march 27, 2015 submit document feedback ascr_config (dfh) definition: allows user configuration of ascr setting s. chargemode control achieves a fast ac ting, low deviation transient response by detecting and reacting to very small vari ations in the output voltag e. chargemode control performance is optimized when v due to capacitor ripple is 1% or less of the output voltage. data length in bytes: 4 data format: bit field and non-signed binary type: r/w protectable: yes default value: 015a0190h (ascr enabled, gain 400, residual 90) units: n/a command ascr_config (dfh) format bit field/linear-8 unsigned bit position 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value0000000101011010 format linear-16 unsigned bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value0000000110110000 bits purpose value description 31:25 not used 0000000h not used 24 ascr enable 1enable 0 disable 23:16 ascr residual setting 90 ascr residual 15:0 ascr gain setting 400 ascr gain
zl8801 72 fn8614.3 march 27, 2015 submit document feedback sequence (e0h) definition: identifies the rail ddc id of the prequel and sequel rails when performing multirail sequencing. the device will enable its output when its en or operation enable state, as defined by on _off_config, is set and the preque l device has issued a power-goo d event on the ddc bus. the device will disable its output (using the configured delay values) when the sequel device has issued a power-down event on the ddc bus. the data field is a two-byte value. the most-significant byte co ntains the 5-bit rail ddc id of the prequel device. the least-s ignificant byte contains the 5-bit rail ddc id of the sequel device. the most significant bit of each byte contains the enable of the preq uel or sequel mode. data length in bytes: 2 data format: bit field type: r/w protectable: yes default value: 00h (prequel and sequel disabled) units: n/a command sequence (e0h) format bit field bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 0000000000000000 bit field name value s etting description 15 prequel enable 0 disable disable, no prequel preceding this rail. 1 enable enable, prequel to this rail is defined by bits 12:8. 14:13 not used 0 not used not used 12:8 prequel rail ddc id 0-31d ddc id se t to the ddc id of the prequel rail. 7sequel enable 0 disable disable, no sequel following this rail. 1 enable enable, sequel to this rail is defined by bits 4:0. 6:5 not used 0 not used not used 4:0 sequel rail ddc id 0-31d ddc id set to the ddc id of the sequel rail.
zl8801 73 fn8614.3 march 27, 2015 submit document feedback track_config (e1h) definition: configures the voltage tracking modes of th e device. single device (2-phase) tracking is supported. tracking as part of a 4-, 6- or 8-phase current sharing group is not supported. data length in bytes: 1 data format: bit field type: r/w protectable: yes default value: 00h units: n/a command track_config (e1h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 00000000 bit field name value setting description 7 voltage tracking control 0 disable tracking is disabled. 1 enable tracking is enabled. 6:3 not used 0000 not used not used 2 tracking ratio control 0 100% output tracks at 100% ratio of vtrk input. 1 50% output tracks at 50% ratio of vtrk input. 1 tracking upper limit 0 target voltage output voltage is limited by target voltage. 1 vtrk voltage output voltage is limited by vtrk voltage. 0 not used 0 not used not used
zl8801 74 fn8614.3 march 27, 2015 submit document feedback ddc_group (e2h) definition: rails (output voltages) are assigned group numbers in or der to share specified behaviors. the ddc_group command configures fault spreading group id and en able, broadcast operation group id and enab le and broadcast vout_command group id and enable. note that ddc groups are separate and unique from ddc phases. current sharing rails need to be in the same ddc grou p in order to respond to broadcast vout_command and operation co mmands. power fail event response s are automatically spread in current sharing rails when they are configured using ddc_config, regardless of their setting in ddc_group. data length in bytes: 3 data format: bit field type: r/w protectable: yes default value: 000000h (ignore broadcast vout_command and oper ation, sequence shutdown on power fail event) units: n/a device_id (e4h) definition: returns the 16-byte (character) device identifier string. data length in bytes: 16 data format: ascii. iso/iec 8859-1 type: block read protectable: no default value: units: n/a command ddc_group (e2h) format bit field bit position23222120191817161514131211109876543210 access r/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/w function see following table default value 000000000000000000000000 bits purpose value description 23 broadcast margin command response 1 responds to broadcast margin command with same group id. 0 ignores broadcast margin command. 22:18 broadcast vout_command group id 0-31d group id sent as data for broadcast vout_command events. 17 broadcast vout_command response 1 responds to broadcast vout_c ommand with same group id. 0 ignores broadcast vout_command. 16:12 broadcast vout_command group id 0-31d group id sent as data for broadcast vout_command events. 11 broadcast operation response 1 responds to broadcast operation with same group id. 0 ignores broadcast operation. 10:6 broadcast operation group id 0-31d group id sent as data for broadcast broadcast operation events. 5 power fail response 1 responds to power fail events with same group id by shutting down immediately. 0 responds to power fail events with same group id with sequenced shutdown. 4:0 power fail group id 0-31d group id sent as data for broadcast power fail events.
zl8801 75 fn8614.3 march 27, 2015 submit document feedback mfr_iout_oc_fault_response (e5h) definition : configures the i out overcurrent fault response as defined by the tabl e below. the command format is the same as the pmbus? standard fault responses except that it sets the overcurrent status bit in status_iout. data length in bytes: 1 data format: bit field type: r/w protectable : yes default value: 80h (immediate shut down, no retries) units: retry time = 70ms command mfr_iout_oc_fault_response (e5h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 10000000 bit field name value description 7:6 response behavior: for all modes, the device: ? pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 not used 01 not used 10 disable without delay and retry acco rding to the setting in bits 5:3. 11 not used 5:3 retry setting 000 no retry. the output remains di sabled until the fault is cleared. 001-110 not used 111 attempts to restart continuously, without lim itation, until it is commanded off (by the control pin or operation command or both), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 111 not used. retry time is 70ms.
zl8801 76 fn8614.3 march 27, 2015 submit document feedback mfr_iout_uc_fault_response (e6h) definition: configures the i out undercurrent fault response as defined by the tabl e below. the command format is the same as the pmbus? standard fault responses except that it sets the undercurrent status bit in status_iout. data length in bytes: 1 data format: bit field type: r/w protectable: yes default value: 80h (immediate shutdown, no retries) units: retry time = 70ms iout_avg_oc_fault_limit (e7h) definition: sets the i out average overcurrent fault threshold for each phase (phase 0 and phase 1). for downslope sensing, this corresponds to the average of all the current samples taken duri ng the (1-d) time interval, excl uding the current sense blankin g time (which occurs at the beginning of the 1-d interval). for upslope sensing, this corresponds to the average of all the current sa mples taken during the d time interval, excluding the current sense blanking time (which occurs at the beginning of the d interval). this feature shares the oc fault bit operation (in status_iou t) and oc fault response with iout_ oc_fault_limit. data length in bytes: 2 data format: linear-11 type: r/w protectable : yes default value: da80h (20a) units: amperes equation: iout_avg_oc_fault_limit = y x 2n range : -100 to 100a command mfr_iout_uc_fault_response (e6h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 10000000 bit field name value description 7:6 response behavior: for all modes, the device: ? pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 not used 01 not used 10 disable without delay and retry according to the setting in bits 5:3. 11 not used 5:3 retry setting 000 no retry. the output remains disabled until the fault is cleared. 001-110 not used 111 attempts to restart continuously, without limitation, until it is commanded off (by the control pin or operation command or both), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 111 not used. retry time is 70ms. command iout_avg_oc_fault_limit (e7h) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1 101101010000000
zl8801 77 fn8614.3 march 27, 2015 submit document feedback iout_avg_uc_fault_limit (e8h) definition: sets the i out average undercurrent fault threshold f or each phase (phase 0 and phase 1). for downslope sensing, this corresponds to the average of all the current samples taken duri ng the (1-d) time interval, excl uding the current sense blankin g time (which occurs at the beginning of the 1-d interval). for upslope sensing, this corresponds to the average of all the current sa mples taken during the d time interval, excluding the current sense blanking time (which occurs at the beginning of the d interval). this feature shares the uc fault bit operation (in status_iou t) and uc fault response with iout_ uc_fault_limit. data length in bytes: 2 data format: linear-11 type: r/w protectable: yes default value: d580h (-10a) units: amperes equation: iout_avg_uc_fault_limit = y x 2n range : -100 to 100a mfr_user_config (e9h) definition: this command is used to set options for output voltage se nsing, maximum output voltage override, smbus time out and ddc and sync output configurations. data length in bytes: 2 data format: bit field type: r/w protectable: yes default value: 0000h units: n/a command iout_avg_uc_fault_limit (e8h) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1 101010110000000 command mfr_user_config (e9h) format bit field bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 0000000000000000 bits purpose value description 15:7 not used 000000000 not used 6 ddc output configuration 0 ddc output open drain. 1 ddc output push-pull. 5not used 0not used 4 disable smbus time-outs 0 smbus time outs enabled. 1 smbus time outs disabled. 3not used 0not used 2:1 sync i/o control 00 use internal clock. 01 use internal clock and output internal clock. 10 use external clock. 11 not used 0not used 0not used
zl8801 78 fn8614.3 march 27, 2015 submit document feedback snapshot (eah) definition: the snapshot command is a 32 byte read-back of parametric and status values. it allows monitoring and status data to be stored to nvram either during a fault cond ition or via a system-defined time using th e snapshot_control command. snapshot is continuously updated in ram and can be re ad using the snapshot command after a snap shot_control 03h (erase snapshot data) has been written when the device is disabled. when a fault occurs , the latest snapshot in ram is stored to nvram. snapshot data can read back by writing a 01h to the snapshot_control command, then reading snapshot. snapshot data will not update automatically and snapshot data in nvram will not be written after a fault until a snapshot_control 03h has been written again. note: it is advised that this step be performed while the device?s operation is disabled. data length in bytes: 32 data format: bit field type: block read protectable: no default value: n/a units: n/al blank_params (ebh) definition: returns a 16 byte string which indicates which parameter values were either retrieved by the last restore operation or have been written since that time. reading blank_params immediately after a restore op eration allows the user to determine whic h parameters are stored in that store. a one indicates the parameter is not present in the store and has not been written since t he restore operation. data length in bytes: 16 data format: bit field type: block read protectable: no default value: ff?ffh byte number value pmbus? command format 31:29 not used not used 0000h 28:27 i out 1 read_iout1 (a1h) 2 byte linear-11 26:25 i out 0 read_iout0 (a2h) 2 byte linear-11 24:23 external temperature 1 read_temperature_3 (8fh) 2 byte linear-11 22 nvram memory status byte n/a bit field 21 manufacturer specific status byte stat us_mfr_specific (80h ) 1 byte bit field 20 cml status byte status_cml (7eh) 1 byte bit field 19 temperature status byte status_temperature (7dh) 1 byte bit field 18 input status byte status_input (7ch) 1 byte bit field 17 i out status byte status_iout (7bh) 1 byte bit field 16 v out status byte status_vout (7ah) 1 byte bit field 15:14 switching frequency read_frequency (95h) 2 byte linear-11 13:12 external temperature 0 read_temperature_2 (8eh) 2 byte linear-11 11:10 internal temperature read_temperature_1 (8dh) 2 byte linear-11 9:8 duty cycle read_duty_cycle (94h) 2 byte linear-11 7:6 highest measured output current n/a 2 byte linear-11 5:4 output current read_iout (8ch) 2 byte linear-11 3:2 output voltage read_vout (8bh) 2 byte linear-16 unsigned 1:0 input voltage read_vin (88h) 2 byte linear-11
zl8801 79 fn8614.3 march 27, 2015 submit document feedback snapshot_control (f3h) definition: writing a 01h will cause the device to copy the current snapshot values from nvram to the 32 byte snapshot command parameter. writing a 02h will cause the device to write the curr ent snapshot values to nvram, 03 will erase all snapshot values from nvram. all other values will be ignored. snapshot 03h must be written to the device when the device is disabled. data will not be updated, or written to nvram after a fault occurs until the snapshot 03h command has been written. data length in bytes: 1 data format: bit field type: r/w byte protectable: yes default value: 00h units: n/a restore_factory (f4h) definition: restores the device to the hard-coded factory default values and pin-strap definitions. the device retains the default and user stores for restoring. security level is changed to level 1 following this command. data length in bytes: 0 data format: n/a type: write only protectable: yes default value: n/a units: n/a mfr_vmon_ov_fault_limit (f5h) definition: sets the vmon overvoltage fault threshold. a vmon parameter equals 16 times the voltage applied to the vmon pin. the vmon overvoltage warn limit is automatically set to 90% of this fault value. data length in bytes: 2 data format: linear-11 type: r/w protectable: yes default value: d300h (12v) units: v equation: mfr_vmon_ov_fault_limit = y x 2 n range : 0 to 19v command snapshot_control (f3h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 00000000 value description 01 read snapshot values from nvram 02 write snapshot values to nvram 03 erase snapshot values from nv ram command mfr_vmon_ov_fault_limit (f5h) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1101001100000000
zl8801 80 fn8614.3 march 27, 2015 submit document feedback mfr_vmon_uv_fault_limit (f6h) definition: sets the vmon undervoltage fault threshold. a vmon paramete r equals 16 times the voltage applied to the vmon pin. the vmon undervoltage warn limit is automati cally set to 110% of this fault value. data length in bytes: 2 data format: linear-11 type: r/w protectable: yes default value: ca00h (4.0v) units: v equation: mfr_vmon_uv_fault_limit = y x 2 n range : 0 to 19v mfr_read_vmon (f7h) definition: reads the vmon voltage. data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: v equation: mfr_read_vmon = y x 2 n range : 0 to 19v command mfr_vmon_uv_fault_limit (f6h) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1100101000000000 command mfr_read_vmon (f7h) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a
zl8801 81 fn8614.3 march 27, 2015 submit document feedback mfr_vmon_ov_fault_response (f8h) definition: configures the vmon overvoltage fault resp onse as defined by the following table. note: the delay time is the time between restart attempts data length in bytes: 1 data format: bit field type: r/w protectable: yes default value: 80h (immediate shut down, no retries) units: retry time = 70ms command mfr_vmon_ov_fault_response (f8h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 10000000 bit field name value description 7:6 response behavior: the device: ? pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 not used 01 not used 10 disable without delay and retry acco rding to the setting in bits 5:3. 11 not used 5:3 retry setting 000 no retry. the output remains di sabled until the fault is cleared. 001-110 not used 111 attempts to restart continuously, without lim itation, until it is commanded off (by the control pin or operation command or both), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 111 not used. retry time is 70ms.
zl8801 82 fn8614.3 march 27, 2015 submit document feedback mfr_vmon_uv_fault_response (f9h) definition: configures the vmon undervoltage fault response as defined by the following table. note: the delay time is the time between restart attempts. data length in bytes: 1 data format: bit field. type: r/w protectable: yes default value: 80h (immediate shut down, no retries) units: retry time = 70ms command mfr_vmon_uv_fault_response (f9h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 10000000 bit field name value description 7:6 response behavior: the device: ? pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 not used 01 not used 10 disable without delay and retry acco rding to the setting in bits 5:3. 11 not used 5:3 retry setting 000 no retry. the output remains di sabled until the fault is cleared. 001-110 not used 111 attempts to restart continuously, without lim itation, until it is commanded off (by the control pin or operation command or both), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 111 not used. retry time is 70ms.
zl8801 83 fn8614.3 march 27, 2015 submit document feedback security_level (fah) definition: the device provides write protection for individual commands . each bit in the unprotect parameter controls whether its corresponding command is writable (commands are always readable). if a command is not writable, a password must be entered in o rder to change its parameter (i.e., to enable writes to that command). there are two types of passwords, public and private. the public password provides a simple lock-and-key protection against accidental changes to the device. it would typically be sent to the device in the application prior to making changes. private passwords allow commands marked as nonwritable in th e unprotect parameter to be changed. priva te passwords are intended for protecting default-installed configurat ions and would not typically be used in the application. each store (user and default) can have its own unprotect string and private passwor d. if a command is marked as nonwritable in the default unpro tect parameter (its corresponding bit is cleared), the private password in the default store must be sent in order to change that co mmand. if a command is writable according to the default unprotect parameter, it may still be marked as nonw ritable in the user store unpro tect parameter. in this case, the user private password can be sent to make the command writable. the device supports four levels of security. each level is designed to be used by a particular class of users, ranging from mod ule manufacturers to end users, as discussed in the following. levels 0 and 1 correspond to the public password. all other levels r equire a private password. writing a private password can only raise the security level. writing a public password will reset the level down to 0 or 1. figure 13 shows the algorithm used by the device to dete rmine if a particular command write is allowed. figure 13. algorithm used to dete rmine when a command is writable always writeable ? security level == 3 ? default unprotect == 0 ? security level == 2 ? user unprotect == 0 ? security level == 1 ? write allowed write prohibited y y y y write attempted read only ? n y y y n n n n n n
zl8801 84 fn8614.3 march 27, 2015 submit document feedback security level 3 ? module vendor level 3 is intended primarily for use by module vendors to protec t device configurations in the default store. clearing a unpro tect bit in the default store implies that a command is writ able only at level 3 and above. the device?s security level is raised to level 3 by writing the private password value previously stored in the default store. to be effective, the module vendor must clear the unprotect bit corresponding to the store_default_all and restore_default commands. otherwise, level 3 protection is ineffective since the entire store coul d be replaced by the user, including the enclosed private password. security level 2 ? user level 2 is intended for use by the end user of the device. clea ring a unprotect bit in the user store implies that a command is writable only at level 2 and above. the device?s security level is raised to level 2 by writing the private password value previously stored in the user store. to be effective, the user must clear the unprotect bit correspondin g to the store_user_all, restore_default_all, store_default_all and restore_default commands. otherwise, level 2 protection is ineffective since the entire store could be replaced, including the enclosed private password. security level 1 ? public level 1 is intended to protect against accidental changes to ordi nary commands by providing a gl obal write-enable. it can be us ed to protect the device from erroneous bus operations. it provides access to commands whose unprotect bit is set in both the default and use r store. security is raised to level 1 by writing the public password stored in the user store using the public_password command. the pu blic password stored in the default store has no effect. security level 0 - unprotected level 0 implies that only comman ds which are always writable (e .g., public_password) are availabl e. this represents the lowest authority level and hence the most protected state of the device. the level can be reduced to 0 by using public_password to write any val ue, which does not match the stored public password. data length in bytes: 1 data format: hex type: read byte protectable: no default value: 01h units: n/a reference: an2031 - writing configuration files for intersil digital power devices command security_level (fah) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00000011 bit field name value description 7:2 not used 00000 not used 1:0 security level 00 security level 0 01 security level 1 10 security level 2 11 security level 3
zl8801 85 fn8614.3 march 27, 2015 submit document feedback private_password (fbh) definition: sets the private password string. data length in bytes: 9 data format: ascii. iso/iec 8859-1 type: r/w block protectable: no default value: 000000000000000000h units: n/a reference: an2031 - writing configuration files for intersil digital power devices public_password (fch) definition : sets the public password string. data length in bytes: 4 data format: ascii. iso/iec 8859-1 type: r/w protectable: no default value: 00000000h units: n/a reference: an2031 - writing configuration files for intersil digital power devices unprotect (fdh) definition: sets a 256-bit (32-byte) parameter which identifies which commands are to be protected against write-access at lower security levels. each bit in this parameter corresp onds to a command according to the command?s code. the co mmand with a code of 01h (operation), for example, is protected by the 2nd least-signif icant bit of the least-significant byte, followed by the command with a code of 02h (on_off_config) and so forth. note that all possible commands have a corresponding bit regardless of whether they are prote ctable or supported by the device. clearing a command?s unprotect bit indica tes that write-access to that co mmand is only allowed if the device?s security level has been raised to an appropriate level. the unprotect bits in the default store require a security level 3 to b e writable. the unprotect bits in the user store require a security level of 2 or higher to be writable. data length in bytes: 32 data format: custom type: r/w block protectable: no default value: ff?ffh units: n/a reference: an2031 - writing configuration files for intersil digital power devices
zl8801 86 intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description only. intersil corporat ion reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to be accurate and reliable. however, no responsi bility is assumed by intersil or its subsid iaries for its use; nor for any infringem ents of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of i ntersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com fn8614.3 march 27, 2015 for additional products, see www.intersil.com/en/products.html submit document feedback about intersil intersil corporation is a leading provider of innovative power ma nagement and precision analog so lutions. the company's product s address some of the largest markets within the industrial and infrastr ucture, mobile computing and high-end consumer markets. for the most updated datasheet, application notes, related documentatio n and related parts, please see the respective product information page found at www.intersil.com . you may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask . reliability reports are also av ailable from our website at www.intersil.com/support revision history the revision history provided is for informational purposes only and is believed to be accurate, but not warranted. please go t o the intersil website to make sure you have the latest revision. date revision change march 27, 2015 fn8614.3 ?simplified application? on page 3 removed wire connecting isena0, isenb0, and vdrv. january 8, 2015 fn8614.2 ? pin configuration, page 6, pin names swapped for pins 40 and 41: pin 40 - xtemp1p changed to: xtemp1n pin 41 - xtemp1n changed to: xtemp1p ?pin description table, page 6, pin names swapped for pins 40 and 41: pin 40 - xtemp1p changed to: xtemp1n pin 41 - xtemp1n changed to: xtemp1p september 25, 2014 fn8614.1 added table ?key differences between family of parts? on page 1. on page 1: added related literature. added part number zl8801alaft7a and demonstr ation boards to ordering information table. added demo boards to ordering information table june 18, 2014 fn8614.0 initial release
zl8801 87 fn8614.3 march 27, 2015 submit document feedback package outline drawing l44.7x7b 44 lead quad flat no-lead plastic package rev 0, 10/09 located within the zone indicated. the pin #1 indentifier may b e unless otherwise specified, tolerance : decimal 0.05 tiebar shown (if present) is a non-functional feature. the configuration of the pin #1 identifier is optional, but mus t be between 0.15mm and 0.30mm from the terminal tip. dimension b applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing conform to asme y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: bottom view detail "x" side view typical recommended land pattern top view c 0.2 ref 0 . 05 max. 0 . 00 min. 5 7.00 a b 7.00 (4x) 0.15 6 pin 1 index 34 pin #1 44 5.00 typ 40x 0.50 exp. dap 11 1 33 22 44x 0.55 0.1 12 6 ( 44 x 0.75) (44x .25) (40x 0.50) ( 6.65 ) ( 5.20) 5.20 0.1 exp. dap 0.10 44x 0.25 a mc b 4 5.20 0.1 1.00 max see detail "x" 0.08 0.10 c c c ( 6.65 ) ( 5.20 ) 23 index area area side view complies to jedec mo220 vkkd-1. 7.

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